From 0530d22a1de1d6ebda4da4a8a1fd7963491f89ec Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Thu, 4 Mar 2021 16:06:18 +0100 Subject: [PATCH] sync --- src/main/scala/vexriscv/plugin/Plugin.scala | 3 +++ src/test/scala/vexriscv/ip/fpu/FpuTest.scala | 1 - 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/main/scala/vexriscv/plugin/Plugin.scala b/src/main/scala/vexriscv/plugin/Plugin.scala index 957a12e..96d2bc6 100644 --- a/src/main/scala/vexriscv/plugin/Plugin.scala +++ b/src/main/scala/vexriscv/plugin/Plugin.scala @@ -10,7 +10,10 @@ trait Plugin[T <: Pipeline] extends Nameable{ var pipeline : T = null.asInstanceOf[T] setName(this.getClass.getSimpleName.replace("$","")) + // Used to setup things with other plugins def setup(pipeline: T) : Unit = {} + + //Used to flush out the required hardware (called after setup) def build(pipeline: T) : Unit implicit class implicitsStage(stage: Stage){ diff --git a/src/test/scala/vexriscv/ip/fpu/FpuTest.scala b/src/test/scala/vexriscv/ip/fpu/FpuTest.scala index 290e39b..fb5943a 100644 --- a/src/test/scala/vexriscv/ip/fpu/FpuTest.scala +++ b/src/test/scala/vexriscv/ip/fpu/FpuTest.scala @@ -68,7 +68,6 @@ class FpuTest extends FunSuite{ dut.clockDomain.forkSimSpeedPrinter(5.0) - class TestCase(op : String){ def build(arg : String) = new ProcessStream(s"testfloat_gen $arg -tininessafter -forever -$op"){ def f32_f32_f32 ={