From 0c4872961166aabb59b240bc4462b16e2bae64ad Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Fri, 29 Mar 2019 08:43:15 +0100 Subject: [PATCH] Sync impact less changes (asfar i know) --- src/main/c/emulator/build/emulator.asm | 2 +- src/main/c/emulator/build/emulator.hex | 2 +- src/main/c/emulator/src/main.c | 2 +- src/main/c/emulator/src/riscv.h | 2 ++ src/main/scala/vexriscv/demo/Linux.scala | 22 +++++++++++++++++++++- 5 files changed, 26 insertions(+), 4 deletions(-) diff --git a/src/main/c/emulator/build/emulator.asm b/src/main/c/emulator/build/emulator.asm index cb720c3..b871813 100644 --- a/src/main/c/emulator/build/emulator.asm +++ b/src/main/c/emulator/build/emulator.asm @@ -125,7 +125,7 @@ Disassembly of section .text: 800001ac: 0000b7b7 lui a5,0xb 800001b0: 10078793 addi a5,a5,256 # b100 <__stack_size+0xa900> 800001b4: 30279073 csrw medeleg,a5 -800001b8: 02000793 li a5,32 +800001b8: 22200793 li a5,546 800001bc: 30379073 csrw mideleg,a5 800001c0: 14305073 csrwi sbadaddr,0 800001c4: 00008067 ret diff --git a/src/main/c/emulator/build/emulator.hex b/src/main/c/emulator/build/emulator.hex index 1892272..d0e288e 100644 --- a/src/main/c/emulator/build/emulator.hex +++ b/src/main/c/emulator/build/emulator.hex @@ -26,7 +26,7 @@ :10017C00B70700809387C70773905730B717008075 :10018C00938707FB73900734B71700009387078892 :10019C007390073073504030B70700C0739017341A -:1001AC00B7B70000938707107390273093070002AE +:1001AC00B7B700009387071073902730930720226E :1001BC00739037307350301467800000B71700808D :1001CC00938707FB131525003305F5000325050060 :1001DC0067800000B717008013152500938707FB75 diff --git a/src/main/c/emulator/src/main.c b/src/main/c/emulator/src/main.c index 1181786..bcaf82f 100755 --- a/src/main/c/emulator/src/main.c +++ b/src/main/c/emulator/src/main.c @@ -15,7 +15,7 @@ void init() { csr_write(mie, 0); csr_write(mepc, OS_CALL); csr_write(medeleg, MEDELEG_INSTRUCTION_PAGE_FAULT | MEDELEG_LOAD_PAGE_FAULT | MEDELEG_STORE_PAGE_FAULT | MEDELEG_USER_ENVIRONNEMENT_CALL); - csr_write(mideleg, MIDELEG_SUPERVISOR_TIMER); + csr_write(mideleg, MIDELEG_SUPERVISOR_TIMER | MIDELEG_SUPERVISOR_EXTERNAL | MIDELEG_SUPERVISOR_SOFTWARE); csr_write(sbadaddr, 0); //Used to avoid simulation missmatch } diff --git a/src/main/c/emulator/src/riscv.h b/src/main/c/emulator/src/riscv.h index ea6ddd5..facb90d 100644 --- a/src/main/c/emulator/src/riscv.h +++ b/src/main/c/emulator/src/riscv.h @@ -9,7 +9,9 @@ #define MEDELEG_LOAD_PAGE_FAULT (1 << 13) #define MEDELEG_STORE_PAGE_FAULT (1 << 15) #define MEDELEG_USER_ENVIRONNEMENT_CALL (1 << 8) +#define MIDELEG_SUPERVISOR_SOFTWARE (1 << 1) #define MIDELEG_SUPERVISOR_TIMER (1 << 5) +#define MIDELEG_SUPERVISOR_EXTERNAL (1 << 9) #define MIE_MTIE (1 << 7) #define MIP_STIP (1 << 5) diff --git a/src/main/scala/vexriscv/demo/Linux.scala b/src/main/scala/vexriscv/demo/Linux.scala index c274554..e96260d 100644 --- a/src/main/scala/vexriscv/demo/Linux.scala +++ b/src/main/scala/vexriscv/demo/Linux.scala @@ -58,6 +58,10 @@ make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DH make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LINUX_SOC=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/linux/linux-1c163f4c7b3f621efff9b28a47abb36f7378d783/vmlinux.bin DTB=/home/spinalvm/hdl/linux/linux-1c163f4c7b3f621efff9b28a47abb36f7378d783/rv32.dtb RAMDISK=/home/spinalvm/hdl/linuxDave/initramdisk_dave TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099 +make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LINUX_SOC=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/linux/linux-1c163f4c7b3f621efff9b28a47abb36f7378d783/vmlinux.bin DTB=/home/spinalvm/hdl/linux/linux-1c163f4c7b3f621efff9b28a47abb36f7378d783/rv32.dtb RAMDISK=/home/spinalvm/hdl/linux/fs/rootfs.ext2 TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099 + + +make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LINUX_SOC=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/linux/linux-1c163f4c7b3f621efff9b28a47abb36f7378d783/vmlinux.bin DTB=/home/spinalvm/hdl/linux/linux-1c163f4c7b3f621efff9b28a47abb36f7378d783/rv32.dtb RAMDISK=/home/spinalvm/hdl/linux/debug/rootfs.cpio.lzma TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099 @@ -69,14 +73,30 @@ ARCH=riscv CROSS_COMPILE=riscv32-unknown-linux-gnu- make -j`nproc`; riscv32-unkn riscv64-unknown-elf-objdump -S -d vmlinux > vmlinux.asm; split -b 1M vmlinux.asm riscv32-unknown-linux-gnu-objdump -S -d vmlinux > vmlinux.asm; split -b 1M vmlinux.asm - +Linux => +ARCH=riscv CROSS_COMPILE=riscv32-unknown-linux-gnu- make menuconfig ARCH=riscv CROSS_COMPILE=riscv32-unknown-linux-gnu- make -j`nproc`; riscv32-unknown-linux-gnu-objcopy -O binary vmlinux vmlinux.bin + + split -b 1M vmlinux.asm dtc -O dtb -o rv32.dtb rv32.dts make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LITEX=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/riscv-linux/vmlinux.bin DTB=/home/spinalvm/hdl/riscv-linux/rv32.dtb RAMDISK=/home/spinalvm/hdl/linuxDave/initramdisk_dave TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099 + +https://github.com/riscv/riscv-qemu/wiki#build-and-install + + +buildroot => +make spinalhdl_vexriscv_sim_defconfig +make -j + +make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LINUX_SOC=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/linux/buildroot/output/images/Image DTB=/home/spinalvm/hdl/linux/linux-1c163f4c7b3f621efff9b28a47abb36f7378d783/rv32.dtb RAMDISK=/home/spinalvm/hdl/linux/buildroot/output/images/rootfs.tar TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099 + + + + */