diff --git a/src/test/cpp/raw/privSpec/.gitignore b/src/test/cpp/raw/privSpec/.gitignore
new file mode 100644
index 0000000..c12cb2c
--- /dev/null
+++ b/src/test/cpp/raw/privSpec/.gitignore
@@ -0,0 +1,4 @@
+*.map
+*.v
+*.elf
+*.o
\ No newline at end of file
diff --git a/src/test/cpp/raw/privSpec/makefile b/src/test/cpp/raw/privSpec/makefile
new file mode 100644
index 0000000..7ef3700
--- /dev/null
+++ b/src/test/cpp/raw/privSpec/makefile
@@ -0,0 +1,3 @@
+PROJ_NAME=privSpec
+
+include ../common/asm.mk
\ No newline at end of file
diff --git a/src/test/cpp/raw/privSpec/src/crt.S b/src/test/cpp/raw/privSpec/src/crt.S
new file mode 100644
index 0000000..d9a095d
--- /dev/null
+++ b/src/test/cpp/raw/privSpec/src/crt.S
@@ -0,0 +1,54 @@
+.globl _star
+#define TEST_ID x28
+
+_start:
+    la x1, fail
+    csrw mtvec, x1
+
+test1:
+    li TEST_ID, 1
+    csrw misa, x0
+
+    //Test xtvec mode
+    li x1, 1
+    csrw mtvec, x1
+    csrr x2, mtvec
+    bnez x2, fail
+    csrw stvec, x1
+    csrr x2, stvec
+    bnez x2, fail
+
+    li x1, 9
+    csrw mcause, x1
+    csrr x2, mcause
+    bne x2, x1, fail
+
+    csrr x0, pmpcfg0
+    csrw pmpcfg0, x0
+
+    csrr x0, pmpcfg3
+    csrw pmpcfg3, x0
+
+    csrr x0, pmpaddr0
+    csrw pmpaddr0, x0
+
+    csrr x0, pmpaddr15
+    csrw pmpaddr15, x0
+
+
+    j pass
+
+fail:
+    li x2, 0xF00FFF24
+    sw TEST_ID, 0(x2)
+
+pass:
+    li x2, 0xF00FFF20
+    sw x0, 0(x2)
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
diff --git a/src/test/cpp/raw/privSpec/src/ld b/src/test/cpp/raw/privSpec/src/ld
new file mode 100644
index 0000000..93d8de8
--- /dev/null
+++ b/src/test/cpp/raw/privSpec/src/ld
@@ -0,0 +1,16 @@
+OUTPUT_ARCH( "riscv" )
+
+MEMORY {
+  onChipRam (W!RX)/*(RX)*/ : ORIGIN = 0x80000000, LENGTH = 128K
+}
+
+SECTIONS
+{
+
+   .crt_section :
+   {
+    . = ALIGN(4);
+    *crt.o(.text)
+   } > onChipRam
+
+}