From 17d52ce58f65a194c09220a06c11081661364fcc Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Fri, 21 Oct 2022 18:58:40 +0200 Subject: [PATCH] privileged debug now access data cache with caching enable --- src/main/scala/vexriscv/plugin/CsrPlugin.scala | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/main/scala/vexriscv/plugin/CsrPlugin.scala b/src/main/scala/vexriscv/plugin/CsrPlugin.scala index 2b6fb80..ee3fe67 100644 --- a/src/main/scala/vexriscv/plugin/CsrPlugin.scala +++ b/src/main/scala/vexriscv/plugin/CsrPlugin.scala @@ -801,7 +801,6 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep case p : PredictionInterface => p.inDebugNoFetch() case _ => } - if(pipeline.things.contains(DEBUG_BYPASS_CACHE)) pipeline(DEBUG_BYPASS_CACHE) := True } val wakeService = serviceElse(classOf[IWake], null) @@ -864,7 +863,7 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep val tdata1 = new Area{ val read = B(0, 32 bits) - val tpe = Reg(UInt(4 bits)) init(2) + val tpe = U(2, 4 bits) val dmode = Reg(Bool()) init(False) val execute = RegInit(False) @@ -877,8 +876,8 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep default -> False ) - csrrw(CSR.TDATA1, read, 2 -> execute , 3 -> u, 4-> s, 6 -> m, 32 - 4 -> tpe, 32 - 5 -> dmode, 12 -> action) - + csrrw(CSR.TDATA1, read, 2 -> execute , 3 -> u, 4-> s, 6 -> m, 32 - 5 -> dmode, 12 -> action) + csrr(CSR.TDATA1, read, 32 - 4 -> tpe) //TODO action sizelo timing select sizehi maskmax }