From 19d5d1ecf142b3ae685170b6ac18d5ac393858e2 Mon Sep 17 00:00:00 2001
From: Dolu1990 <papuchoud@hotmail.com>
Date: Mon, 9 Apr 2018 09:18:08 +0200
Subject: [PATCH] wip

---
 src/main/scala/vexriscv/plugin/Fetcher.scala  | 33 +++++++++----------
 .../vexriscv/plugin/IBusSimplePlugin.scala    |  8 +++--
 2 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/src/main/scala/vexriscv/plugin/Fetcher.scala b/src/main/scala/vexriscv/plugin/Fetcher.scala
index 98ace68..6e02739 100644
--- a/src/main/scala/vexriscv/plugin/Fetcher.scala
+++ b/src/main/scala/vexriscv/plugin/Fetcher.scala
@@ -172,13 +172,13 @@ abstract class IBusFetcherImpl(val catchAccessFault : Boolean,
     })
 
 
-    val iBusCmd = new Area {
-      def input = fetchPc.output
-
-      // ...
-
-      val output = Stream(UInt(32 bits))
-    }
+//    val iBusCmd = new Area {
+//      def input = fetchPc.output
+//
+//      // ...
+//
+//      val output = Stream(UInt(32 bits))
+//    }
 
     case class FetchRsp() extends Bundle {
       val pc = UInt(32 bits)
@@ -188,21 +188,20 @@ abstract class IBusFetcherImpl(val catchAccessFault : Boolean,
 
 
     val iBusRsp = new Area {
-      val inputStages = Vec(Stream(UInt(32 bits)), cmdToRspStageCount)
+      val input = Stream(UInt(32 bits))
+      val pipeline = Vec(Stream(UInt(32 bits)), cmdToRspStageCount)
       for(i <- 0 until cmdToRspStageCount) {
         //          val doFlush = if(i == cmdToRspStageCount- 1 && ???) killLastStage else flush
-        inputStages(i) << {i match {
-          case 0 => iBusCmd.output.m2sPipeWithFlush(flush, relaxedPcCalculation)
-          case _ => inputStages(i-1)/*.haltWhen(fetcherHalt)*/.m2sPipeWithFlush(flush)
+        pipeline(i) << {i match {
+          case 0 => input.m2sPipeWithFlush(flush, relaxedPcCalculation)
+          case _ => pipeline(i-1)/*.haltWhen(fetcherHalt)*/.m2sPipeWithFlush(flush)
         }}
       }
 
-      def input = inputStages.last
-
       // ...
 
-      val join = Stream(FetchRsp())
-      val output = if(rspStageGen) join.m2sPipeWithFlush(flush) else join
+      val outputBeforeStage = Stream(FetchRsp())
+      val output = if(rspStageGen) outputBeforeStage.m2sPipeWithFlush(flush) else outputBeforeStage
     }
 
     val decompressor = ifGen(decodePcGen)(new Area{
@@ -255,8 +254,8 @@ abstract class IBusFetcherImpl(val catchAccessFault : Boolean,
         decodeNextPc := decodePc.pcReg
       }else {
         val lastStageStream = if(injectorStage) inputBeforeHalt
-        else if(rspStageGen) iBusRsp.join
-        else if(cmdToRspStageCount > 1)iBusRsp.inputStages(cmdToRspStageCount-2)
+        else if(rspStageGen) iBusRsp.outputBeforeStage
+        else if(cmdToRspStageCount > 1)iBusRsp.pipeline(cmdToRspStageCount-2)
         else throw new Exception("Fetch should at least have two stages")
 
         //          when(fetcherHalt){
diff --git a/src/main/scala/vexriscv/plugin/IBusSimplePlugin.scala b/src/main/scala/vexriscv/plugin/IBusSimplePlugin.scala
index 3617353..18b558e 100644
--- a/src/main/scala/vexriscv/plugin/IBusSimplePlugin.scala
+++ b/src/main/scala/vexriscv/plugin/IBusSimplePlugin.scala
@@ -132,7 +132,9 @@ class IBusSimplePlugin(interfaceKeepData : Boolean, catchAccessFault : Boolean,
     pipeline plug new FetchArea(pipeline) {
 
       val cmd = new Area {
-        import iBusCmd._
+        def input = fetchPc.output
+        def output = iBusRsp.input
+
         output << input.continueWhen(iBus.cmd.fire)
 
         //Avoid sending to many iBus cmd
@@ -161,12 +163,12 @@ class IBusSimplePlugin(interfaceKeepData : Boolean, catchAccessFault : Boolean,
         rspBuffer.io.flush := flush
 
         val fetchRsp = FetchRsp()
-        fetchRsp.pc := input.payload
+        fetchRsp.pc := pipeline.last.payload
         fetchRsp.rsp := rspBuffer.io.pop.payload
         fetchRsp.rsp.error.clearWhen(!rspBuffer.io.pop.valid) //Avoid interference with instruction injection from the debug plugin
 
 
-        val join = StreamJoin(Seq(input, rspBuffer.io.pop), fetchRsp)
+        val join = StreamJoin(Seq(pipeline.last, rspBuffer.io.pop), fetchRsp)
         output << (if(rspStageGen) join.m2sPipeWithFlush(flush) else join)
       }
     }