From 25c0a0ff6fc4980e8ec8b5148fe213c24a245a56 Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Sat, 13 Oct 2018 09:57:13 +0200 Subject: [PATCH] Add RVC into the readme Forgot to add RVC (compressed) support information into the readme --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index c4196b1..e9dae43 100644 --- a/README.md +++ b/README.md @@ -26,7 +26,7 @@ This repository hosts a RISC-V implementation written in SpinalHDL. Here are some specs : -- RV32I[M] instruction set +- RV32I[M][C] instruction set - Pipelined with 5 stages (Fetch, Decode, Execute, Memory, WriteBack) - 1.44 DMIPS/Mhz when all features are enabled - Optimized for FPGA, fully portable