diff --git a/src/test/cpp/custom/atomic/build/atomic.asm b/src/test/cpp/custom/atomic/build/atomic.asm index 56807fa..a7c0b51 100644 --- a/src/test/cpp/custom/atomic/build/atomic.asm +++ b/src/test/cpp/custom/atomic/build/atomic.asm @@ -4,68 +4,185 @@ build/atomic.elf: file format elf32-littleriscv Disassembly of section .crt_section: -00000000 <_start>: - 0: 00100e13 li t3,1 - 4: 10000537 lui a0,0x10000 - 8: 06400593 li a1,100 - c: 06500613 li a2,101 - 10: 06600693 li a3,102 - 14: 00d52023 sw a3,0(a0) # 10000000 - 18: 18b5262f sc.w a2,a1,(a0) - 1c: 00100713 li a4,1 - 20: 0ae61063 bne a2,a4,c0 - 24: 00052703 lw a4,0(a0) - 28: 08e69c63 bne a3,a4,c0 - 2c: 00200e13 li t3,2 - 30: 10000537 lui a0,0x10000 - 34: 00450513 addi a0,a0,4 # 10000004 - 38: 06700593 li a1,103 - 3c: 06800613 li a2,104 - 40: 06900693 li a3,105 - 44: 00d52023 sw a3,0(a0) +00000000 : + 0: 0300006f j 30 <_start> + 4: 00000013 nop + 8: 00000013 nop + c: 00000013 nop + 10: 00000013 nop + 14: 00000013 nop + 18: 00000013 nop + 1c: 00000013 nop + +00000020 : + 20: 34102ef3 csrr t4,mepc + 24: 004e8e93 addi t4,t4,4 + 28: 341e9073 csrw mepc,t4 + 2c: 30200073 mret + +00000030 <_start>: + 30: 00100e13 li t3,1 + 34: 10000537 lui a0,0x10000 + 38: 06400593 li a1,100 + 3c: 06500613 li a2,101 + 40: 06600693 li a3,102 + 44: 00d52023 sw a3,0(a0) # 10000000 48: 18b5262f sc.w a2,a1,(a0) 4c: 00100713 li a4,1 - 50: 06e61863 bne a2,a4,c0 + 50: 22e61663 bne a2,a4,27c 54: 00052703 lw a4,0(a0) - 58: 06e69463 bne a3,a4,c0 - 5c: 00300e13 li t3,3 + 58: 22e69263 bne a3,a4,27c + 5c: 00200e13 li t3,2 60: 10000537 lui a0,0x10000 - 64: 00450513 addi a0,a0,4 # 10000004 + 64: 00450513 addi a0,a0,4 # 10000004 68: 06700593 li a1,103 6c: 06800613 li a2,104 70: 06900693 li a3,105 - 74: 18b5262f sc.w a2,a1,(a0) - 78: 00100713 li a4,1 - 7c: 04e61263 bne a2,a4,c0 - 80: 00052703 lw a4,0(a0) - 84: 02e69e63 bne a3,a4,c0 - 88: 00400e13 li t3,4 - 8c: 10000537 lui a0,0x10000 - 90: 00850513 addi a0,a0,8 # 10000008 - 94: 06a00593 li a1,106 - 98: 06b00613 li a2,107 - 9c: 06c00693 li a3,108 - a0: 00d52023 sw a3,0(a0) - a4: 100527af lr.w a5,(a0) - a8: 18b5262f sc.w a2,a1,(a0) - ac: 00d79a63 bne a5,a3,c0 - b0: 00061863 bnez a2,c0 - b4: 00052703 lw a4,0(a0) - b8: 00e59463 bne a1,a4,c0 - bc: 0100006f j cc + 74: 00d52023 sw a3,0(a0) + 78: 18b5262f sc.w a2,a1,(a0) + 7c: 00100713 li a4,1 + 80: 1ee61e63 bne a2,a4,27c + 84: 00052703 lw a4,0(a0) + 88: 1ee69a63 bne a3,a4,27c + 8c: 00300e13 li t3,3 + 90: 10000537 lui a0,0x10000 + 94: 00450513 addi a0,a0,4 # 10000004 + 98: 06700593 li a1,103 + 9c: 06800613 li a2,104 + a0: 06900693 li a3,105 + a4: 18b5262f sc.w a2,a1,(a0) + a8: 00100713 li a4,1 + ac: 1ce61863 bne a2,a4,27c + b0: 00052703 lw a4,0(a0) + b4: 1ce69463 bne a3,a4,27c + b8: 00400e13 li t3,4 + bc: 10000537 lui a0,0x10000 + c0: 00850513 addi a0,a0,8 # 10000008 + c4: 06a00593 li a1,106 + c8: 06b00613 li a2,107 + cc: 06c00693 li a3,108 + d0: 00d52023 sw a3,0(a0) + d4: 100527af lr.w a5,(a0) + d8: 18b5262f sc.w a2,a1,(a0) + dc: 1ad79063 bne a5,a3,27c + e0: 18061e63 bnez a2,27c + e4: 00052703 lw a4,0(a0) + e8: 18e59a63 bne a1,a4,27c + ec: 00500e13 li t3,5 + f0: 10000537 lui a0,0x10000 + f4: 00850513 addi a0,a0,8 # 10000008 + f8: 06d00593 li a1,109 + fc: 06e00613 li a2,110 + 100: 06f00693 li a3,111 + 104: 00d52023 sw a3,0(a0) + 108: 18b5262f sc.w a2,a1,(a0) + 10c: 16061863 bnez a2,27c + 110: 00052703 lw a4,0(a0) + 114: 16e59463 bne a1,a4,27c + 118: 00600e13 li t3,6 + 11c: 10000537 lui a0,0x10000 + 120: 00c50513 addi a0,a0,12 # 1000000c + 124: 07000593 li a1,112 + 128: 07100613 li a2,113 + 12c: 07200693 li a3,114 + 130: 10000437 lui s0,0x10000 + 134: 01040413 addi s0,s0,16 # 10000010 + 138: 07300493 li s1,115 + 13c: 07400913 li s2,116 + 140: 07500993 li s3,117 + 144: 00d52023 sw a3,0(a0) + 148: 01342023 sw s3,0(s0) + 14c: 100527af lr.w a5,(a0) + 150: 10042aaf lr.w s5,(s0) + 154: 18b5262f sc.w a2,a1,(a0) + 158: 1894292f sc.w s2,s1,(s0) + 15c: 12d79063 bne a5,a3,27c + 160: 10061e63 bnez a2,27c + 164: 00052703 lw a4,0(a0) + 168: 10e59a63 bne a1,a4,27c + 16c: 113a9863 bne s5,s3,27c + 170: 10091663 bnez s2,27c + 174: 00042a03 lw s4,0(s0) + 178: 11449263 bne s1,s4,27c + 17c: 00700e13 li t3,7 + 180: 10000537 lui a0,0x10000 + 184: 01450513 addi a0,a0,20 # 10000014 + 188: 07800593 li a1,120 + 18c: 07900613 li a2,121 + 190: 07a00693 li a3,122 + 194: 01000e93 li t4,16 -000000c0 : - c0: f0100137 lui sp,0xf0100 - c4: f2410113 addi sp,sp,-220 # f00fff24 - c8: 01c12023 sw t3,0(sp) +00000198 : + 198: 00d52023 sw a3,0(a0) + 19c: 100527af lr.w a5,(a0) + 1a0: 18b5262f sc.w a2,a1,(a0) + 1a4: 0cd79c63 bne a5,a3,27c + 1a8: 0c061a63 bnez a2,27c + 1ac: 00052703 lw a4,0(a0) + 1b0: 0ce59663 bne a1,a4,27c + 1b4: fffe8e93 addi t4,t4,-1 + 1b8: 00450513 addi a0,a0,4 + 1bc: 00358593 addi a1,a1,3 + 1c0: 00360613 addi a2,a2,3 + 1c4: 00368693 addi a3,a3,3 + 1c8: fc0e98e3 bnez t4,198 + 1cc: 00800e13 li t3,8 + 1d0: 10000537 lui a0,0x10000 + 1d4: 01850513 addi a0,a0,24 # 10000018 + 1d8: 07800593 li a1,120 + 1dc: 07900613 li a2,121 + 1e0: 07a00693 li a3,122 + 1e4: 00052783 lw a5,0(a0) + 1e8: 18b5262f sc.w a2,a1,(a0) + 1ec: 00100713 li a4,1 + 1f0: 08e61663 bne a2,a4,27c + 1f4: 00052703 lw a4,0(a0) + 1f8: 08e79263 bne a5,a4,27c + 1fc: 00900e13 li t3,9 + 200: 10000537 lui a0,0x10000 + 204: 10050513 addi a0,a0,256 # 10000100 + 208: 07b00593 li a1,123 + 20c: 07c00613 li a2,124 + 210: 07d00693 li a3,125 + 214: 00d52023 sw a3,0(a0) + 218: 100527af lr.w a5,(a0) + 21c: 00000073 ecall + 220: 18b5262f sc.w a2,a1,(a0) + 224: 00100713 li a4,1 + 228: 04e61a63 bne a2,a4,27c + 22c: 00052703 lw a4,0(a0) + 230: 04e69663 bne a3,a4,27c + 234: 00900e13 li t3,9 + 238: 10000537 lui a0,0x10000 + 23c: 20050513 addi a0,a0,512 # 10000200 + 240: 10000837 lui a6,0x10000 + 244: 20480813 addi a6,a6,516 # 10000204 + 248: 07e00593 li a1,126 + 24c: 07f00613 li a2,127 + 250: 08000693 li a3,128 + 254: 08100893 li a7,129 + 258: 00d52023 sw a3,0(a0) + 25c: 01182023 sw a7,0(a6) + 260: 100827af lr.w a5,(a6) + 264: 18b5262f sc.w a2,a1,(a0) + 268: 00100713 li a4,1 + 26c: 00e61863 bne a2,a4,27c + 270: 00082703 lw a4,0(a6) + 274: 00e89463 bne a7,a4,27c + 278: 0100006f j 288 -000000cc : - cc: f0100137 lui sp,0xf0100 - d0: f2010113 addi sp,sp,-224 # f00fff20 - d4: 00012023 sw zero,0(sp) - d8: 00000013 nop - dc: 00000013 nop - e0: 00000013 nop - e4: 00000013 nop - e8: 00000013 nop - ec: 00000013 nop +0000027c : + 27c: f0100137 lui sp,0xf0100 + 280: f2410113 addi sp,sp,-220 # f00fff24 + 284: 01c12023 sw t3,0(sp) + +00000288 : + 288: f0100137 lui sp,0xf0100 + 28c: f2010113 addi sp,sp,-224 # f00fff20 + 290: 00012023 sw zero,0(sp) + 294: 00000013 nop + 298: 00000013 nop + 29c: 00000013 nop + 2a0: 00000013 nop + 2a4: 00000013 nop + 2a8: 00000013 nop diff --git a/src/test/cpp/custom/atomic/build/atomic.elf b/src/test/cpp/custom/atomic/build/atomic.elf index 1df8609..2ac8edb 100755 Binary files a/src/test/cpp/custom/atomic/build/atomic.elf and b/src/test/cpp/custom/atomic/build/atomic.elf differ diff --git a/src/test/cpp/custom/atomic/build/atomic.hex b/src/test/cpp/custom/atomic/build/atomic.hex index f209883..29f28e2 100644 --- a/src/test/cpp/custom/atomic/build/atomic.hex +++ b/src/test/cpp/custom/atomic/build/atomic.hex @@ -1,16 +1,45 @@ -:10000000130E100037050010930540061306500626 -:10001000930660062320D5002F26B518130710007D -:100020006310E60A03270500639CE608130E200010 -:10003000370500101305450093057006130680066A -:10004000930690062320D5002F26B518130710001D -:100050006318E606032705006394E606130E3000D6 +:100000006F00000313000000130000001300000045 +:100010001300000013000000130000001300000094 +:10002000F32E1034938E4E0073901E3473002030E4 +:10003000130E1000370500109305400613065006F6 +:10004000930660062320D5002F26B518130710004D +:100050006316E622032705006392E622130E2000B2 :10006000370500101305450093057006130680063A -:10007000930690062F26B518130710006312E604A6 -:1000800003270500639EE602130E400037050010AB -:10009000130585009305A0061306B0069306C00657 -:1000A0002320D500AF2705102F26B518639AD70057 -:1000B00063180600032705006394E5006F00000144 -:1000C000370110F0130141F22320C101370110F074 -:1000D000130101F2232001001300000013000000AF -:1000E00013000000130000001300000013000000C4 +:10007000930690062320D5002F26B51813071000ED +:10008000631EE61E03270500639AE61E130E30006A +:10009000370500101305450093057006130680060A +:1000A000930690062F26B518130710006318E61C58 +:1000B000032705006394E61C130E4000370500106B +:1000C000130585009305A0061306B0069306C00627 +:1000D0002320D500AF2705102F26B5186390D71A17 +:1000E000631E061803270500639AE518130E5000D7 +:1000F00037050010130585009305D0061306E006AA +:100100009306F0062320D5002F26B518631806168F +:10011000032705006394E516130E600037050010F1 +:100120001305C50093050007130610079306200763 +:100130003704001013040401930430071309400727 +:10014000930950072320D50023203401AF27051041 +:10015000AF2A04102F26B5182F2994186390D712B0 +:10016000631E061003270500639AE51063983A1191 +:1001700063160910032A040063924411130E7000E1 +:1001800037050010130545019305800713069007F6 +:100190009306A007930E00012320D500AF2705107A +:1001A0002F26B518639CD70C631A060C032705008D +:1001B0006396E50C938EFEFF13054500938535008D +:1001C0001306360093863600E3980EFC130E80006B +:1001D0003705001013058501930580071306900766 +:1001E0009306A007832705002F26B51813071000D4 +:1001F0006316E608032705006392E708130E9000D4 +:1002000037050010130505109305B0071306C00746 +:100210009306D0072320D500AF27051073000000F8 +:100220002F26B51813071000631AE60403270500EC +:100230006396E604130E90003705001013050520A1 +:1002400037080010130848209305E0071306F0074D +:1002500093060008930810082320D50023201801D6 +:10026000AF2708102F26B518130710006318E600F3 +:10027000032708006394E8006F000001370110F0C5 +:10028000130141F22320C101370110F0130101F2E3 +:1002900023200100130000001300000013000000E1 +:0C02A00013000000130000001300000019 +:0400000300000030C9 :00000001FF diff --git a/src/test/cpp/custom/atomic/build/atomic.map b/src/test/cpp/custom/atomic/build/atomic.map index af7ef7f..dcb1d9c 100644 --- a/src/test/cpp/custom/atomic/build/atomic.map +++ b/src/test/cpp/custom/atomic/build/atomic.map @@ -16,15 +16,16 @@ END GROUP LOAD /opt/riscv/bin/../lib/gcc/riscv64-unknown-elf/7.1.1/libgcc.a 0x0000000000000000 . = 0x0 -.crt_section 0x0000000000000000 0xf0 +.crt_section 0x0000000000000000 0x2ac 0x0000000000000000 . = ALIGN (0x4) *crt.o(.text) - .text 0x0000000000000000 0xf0 build/src/crt.o - 0x0000000000000000 _start + .text 0x0000000000000000 0x2ac build/src/crt.o + 0x0000000000000020 trap_entry + 0x0000000000000030 _start OUTPUT(build/atomic.elf elf32-littleriscv) -.data 0x00000000000000f0 0x0 - .data 0x00000000000000f0 0x0 build/src/crt.o +.data 0x00000000000002ac 0x0 + .data 0x00000000000002ac 0x0 build/src/crt.o -.bss 0x00000000000000f0 0x0 - .bss 0x00000000000000f0 0x0 build/src/crt.o +.bss 0x00000000000002ac 0x0 + .bss 0x00000000000002ac 0x0 build/src/crt.o diff --git a/src/test/cpp/custom/atomic/build/atomic.v b/src/test/cpp/custom/atomic/build/atomic.v index 207a902..95e4ab6 100755 --- a/src/test/cpp/custom/atomic/build/atomic.v +++ b/src/test/cpp/custom/atomic/build/atomic.v @@ -1,16 +1,44 @@ @00000000 +6F 00 00 03 13 00 00 00 13 00 00 00 13 00 00 00 +13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 +F3 2E 10 34 93 8E 4E 00 73 90 1E 34 73 00 20 30 13 0E 10 00 37 05 00 10 93 05 40 06 13 06 50 06 93 06 60 06 23 20 D5 00 2F 26 B5 18 13 07 10 00 -63 10 E6 0A 03 27 05 00 63 9C E6 08 13 0E 20 00 +63 16 E6 22 03 27 05 00 63 92 E6 22 13 0E 20 00 37 05 00 10 13 05 45 00 93 05 70 06 13 06 80 06 93 06 90 06 23 20 D5 00 2F 26 B5 18 13 07 10 00 -63 18 E6 06 03 27 05 00 63 94 E6 06 13 0E 30 00 +63 1E E6 1E 03 27 05 00 63 9A E6 1E 13 0E 30 00 37 05 00 10 13 05 45 00 93 05 70 06 13 06 80 06 -93 06 90 06 2F 26 B5 18 13 07 10 00 63 12 E6 04 -03 27 05 00 63 9E E6 02 13 0E 40 00 37 05 00 10 +93 06 90 06 2F 26 B5 18 13 07 10 00 63 18 E6 1C +03 27 05 00 63 94 E6 1C 13 0E 40 00 37 05 00 10 13 05 85 00 93 05 A0 06 13 06 B0 06 93 06 C0 06 -23 20 D5 00 AF 27 05 10 2F 26 B5 18 63 9A D7 00 -63 18 06 00 03 27 05 00 63 94 E5 00 6F 00 00 01 -37 01 10 F0 13 01 41 F2 23 20 C1 01 37 01 10 F0 -13 01 01 F2 23 20 01 00 13 00 00 00 13 00 00 00 -13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 +23 20 D5 00 AF 27 05 10 2F 26 B5 18 63 90 D7 1A +63 1E 06 18 03 27 05 00 63 9A E5 18 13 0E 50 00 +37 05 00 10 13 05 85 00 93 05 D0 06 13 06 E0 06 +93 06 F0 06 23 20 D5 00 2F 26 B5 18 63 18 06 16 +03 27 05 00 63 94 E5 16 13 0E 60 00 37 05 00 10 +13 05 C5 00 93 05 00 07 13 06 10 07 93 06 20 07 +37 04 00 10 13 04 04 01 93 04 30 07 13 09 40 07 +93 09 50 07 23 20 D5 00 23 20 34 01 AF 27 05 10 +AF 2A 04 10 2F 26 B5 18 2F 29 94 18 63 90 D7 12 +63 1E 06 10 03 27 05 00 63 9A E5 10 63 98 3A 11 +63 16 09 10 03 2A 04 00 63 92 44 11 13 0E 70 00 +37 05 00 10 13 05 45 01 93 05 80 07 13 06 90 07 +93 06 A0 07 93 0E 00 01 23 20 D5 00 AF 27 05 10 +2F 26 B5 18 63 9C D7 0C 63 1A 06 0C 03 27 05 00 +63 96 E5 0C 93 8E FE FF 13 05 45 00 93 85 35 00 +13 06 36 00 93 86 36 00 E3 98 0E FC 13 0E 80 00 +37 05 00 10 13 05 85 01 93 05 80 07 13 06 90 07 +93 06 A0 07 83 27 05 00 2F 26 B5 18 13 07 10 00 +63 16 E6 08 03 27 05 00 63 92 E7 08 13 0E 90 00 +37 05 00 10 13 05 05 10 93 05 B0 07 13 06 C0 07 +93 06 D0 07 23 20 D5 00 AF 27 05 10 73 00 00 00 +2F 26 B5 18 13 07 10 00 63 1A E6 04 03 27 05 00 +63 96 E6 04 13 0E 90 00 37 05 00 10 13 05 05 20 +37 08 00 10 13 08 48 20 93 05 E0 07 13 06 F0 07 +93 06 00 08 93 08 10 08 23 20 D5 00 23 20 18 01 +AF 27 08 10 2F 26 B5 18 13 07 10 00 63 18 E6 00 +03 27 08 00 63 94 E8 00 6F 00 00 01 37 01 10 F0 +13 01 41 F2 23 20 C1 01 37 01 10 F0 13 01 01 F2 +23 20 01 00 13 00 00 00 13 00 00 00 13 00 00 00 +13 00 00 00 13 00 00 00 13 00 00 00 diff --git a/src/test/cpp/custom/atomic/src/crt.S b/src/test/cpp/custom/atomic/src/crt.S index 9b4a046..2561941 100644 --- a/src/test/cpp/custom/atomic/src/crt.S +++ b/src/test/cpp/custom/atomic/src/crt.S @@ -1,7 +1,23 @@ .globl _start + + + j _start + nop + nop + nop + nop + nop + nop + nop + +.global trap_entry +trap_entry: + csrr x29, mepc + addi x29, x29, 4 + csrw mepc, x29 + mret + _start: - - //Test 1 SC on unreserved area should fail and not write memory li x28, 1 li a0, 0x10000000 @@ -56,8 +72,119 @@ _start: lw a4, 0(a0) bne a1, a4, fail - j pass +//Test 5 redo SC on reserved area should pass and should be written write memory + li x28, 5 + li a0, 0x10000008 + li a1, 109 + li a2, 110 + li a3, 111 + sw a3, 0(a0) + sc.w a2, a1, (a0) + bne a2, x0, fail + lw a4, 0(a0) + bne a1, a4, fail + +//Test 6 Allow two entries at the same time + li x28, 6 + li a0, 0x1000000C + li a1, 112 + li a2, 113 + li a3, 114 + li s0, 0x10000010 + li s1, 115 + li s2, 116 + li s3, 117 + + sw a3, 0(a0) + sw s3, 0(s0) + lr.w a5, (a0) + lr.w s5, (s0) + sc.w a2, a1, (a0) + sc.w s2, s1, (s0) + bne a5, a3, fail + bne a2, x0, fail + lw a4, 0(a0) + bne a1, a4, fail + + bne s5, s3, fail + bne s2, x0, fail + lw s4, 0(s0) + bne s1, s4, fail + +//Test 7 do a lot of allocation to clear the entries + li x28, 7 + li a0, 0x10000014 + li a1, 120 + li a2, 121 + li a3, 122 + li x29, 16 +test7: + sw a3, 0(a0) + lr.w a5, (a0) + sc.w a2, a1, (a0) + bne a5, a3, fail + bne a2, x0, fail + lw a4, 0(a0) + bne a1, a4, fail + add x29, x29, -1 + add a0, a0, 4 + add a1, a1, 3 + add a2, a2, 3 + add a3, a3, 3 + bnez x29, test7 + + +//Test 8 SC on discarded entries should fail + li x28, 8 + li a0, 0x10000018 + li a1, 120 + li a2, 121 + li a3, 122 + lw a5, 0(a0) + sc.w a2, a1, (a0) + li a4, 1 + bne a2, a4, fail + lw a4, 0(a0) + bne a5, a4, fail + + +//Test 9 SC should fail after a context switching + li x28, 9 + li a0, 0x10000100 + li a1, 123 + li a2, 124 + li a3, 125 + sw a3, 0(a0) + lr.w a5, (a0) + scall + sc.w a2, a1, (a0) + li a4, 1 + bne a2, a4, fail + lw a4, 0(a0) + bne a3, a4, fail + + + +//Test 10 SC should fail if the address doesn't match + li x28, 9 + li a0, 0x10000200 + li a6, 0x10000204 + li a1, 126 + li a2, 127 + li a3, 128 + li a7, 129 + sw a3, 0(a0) + sw a7, 0(a6) + lr.w a5, (a6) + sc.w a2, a1, (a0) + li a4, 1 + bne a2, a4, fail + lw a4, 0(a6) + bne a7, a4, fail + + + j pass fail: //x28 => error code diff --git a/src/test/cpp/regression/atomic.gtkw b/src/test/cpp/regression/atomic.gtkw new file mode 100644 index 0000000..7b10699 --- /dev/null +++ b/src/test/cpp/regression/atomic.gtkw @@ -0,0 +1,36 @@ +[*] +[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI +[*] Thu Jan 4 14:37:30 2018 +[*] +[dumpfile] "/home/spinalvm/hdl/VexRiscv/src/test/cpp/regression/atomic.vcd" +[dumpfile_mtime] "Thu Jan 4 14:36:32 2018" +[dumpfile_size] 1406668 +[savefile] "/home/spinalvm/hdl/VexRiscv/src/test/cpp/regression/atomic.gtkw" +[timestart] 515 +[size] 1784 950 +[pos] -383 -155 +*-7.000000 727 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +[treeopen] TOP. +[treeopen] TOP.VexRiscv. +[sst_width] 289 +[signals_width] 486 +[sst_expanded] 1 +[sst_vpaned_height] 271 +@22 +TOP.VexRiscv.writeBack_RegFilePlugin_regFileWrite_payload_address[4:0] +TOP.VexRiscv.writeBack_RegFilePlugin_regFileWrite_payload_data[31:0] +@28 +TOP.VexRiscv.writeBack_RegFilePlugin_regFileWrite_valid +TOP.VexRiscv.dataCache_1.stageB_atomic_entriesHit +@22 +TOP.VexRiscv.dataCache_1.stageB_atomic_entries_0_address[31:0] +@28 +TOP.VexRiscv.dataCache_1.stageB_atomic_entries_0_size[1:0] +TOP.VexRiscv.dataCache_1.stageB_atomic_entries_0_valid +@22 +TOP.VexRiscv.dataCache_1.stageB_atomic_entries_1_address[31:0] +@28 +TOP.VexRiscv.dataCache_1.stageB_atomic_entries_1_size[1:0] +TOP.VexRiscv.dataCache_1.stageB_atomic_entries_1_valid +[pattern_trace] 1 +[pattern_trace] 0