From 2d2017465e4923b91e4e7752e1ca5e890eebb2b6 Mon Sep 17 00:00:00 2001
From: Andreas Wallner <A.Wallner@innovative-solutions.at>
Date: Sat, 2 Apr 2022 18:22:10 +0200
Subject: [PATCH] Fix reset vector of GenCustomSimdAdd

With the old reset vector half of the tests fail since
they expect the CPU to start at 0x80000000.
(e.g. I-IO, I-NOP, I-LUI, etc.)
---
 src/main/scala/vexriscv/demo/GenCustomSimdAdd.scala | 2 +-
 src/test/cpp/custom/simd_add/src/ld                 | 4 +---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/main/scala/vexriscv/demo/GenCustomSimdAdd.scala b/src/main/scala/vexriscv/demo/GenCustomSimdAdd.scala
index 8b137f5..8d9d6be 100644
--- a/src/main/scala/vexriscv/demo/GenCustomSimdAdd.scala
+++ b/src/main/scala/vexriscv/demo/GenCustomSimdAdd.scala
@@ -13,7 +13,7 @@ object GenCustomSimdAdd extends App{
       plugins = List(
         new SimdAddPlugin,
         new IBusSimplePlugin(
-          resetVector = 0x00000000l,
+          resetVector = 0x80000000l,
           cmdForkOnSecondStage = false,
           cmdForkPersistence = false,
           prediction = NONE,
diff --git a/src/test/cpp/custom/simd_add/src/ld b/src/test/cpp/custom/simd_add/src/ld
index 8d95523..3a4f112 100644
--- a/src/test/cpp/custom/simd_add/src/ld
+++ b/src/test/cpp/custom/simd_add/src/ld
@@ -1,13 +1,11 @@
 OUTPUT_ARCH( "riscv" )
 
 MEMORY {
-  onChipRam (W!RX)/*(RX)*/ : ORIGIN = 0x00000000, LENGTH = 8K
+  onChipRam (W!RX)/*(RX)*/ : ORIGIN = 0x80000000, LENGTH = 8K
 }
 
 SECTIONS
 {
-   . = 0x000;
-
    .crt_section :
    {
     . = ALIGN(4);