From 334df7010cfdc6359155e1658addb5ce0c9e1da9 Mon Sep 17 00:00:00 2001
From: Pradeep2004 <78598837+Pradeep2004@users.noreply.github.com>
Date: Fri, 30 Apr 2021 22:37:26 +0200
Subject: [PATCH] debugging Murax SoC without Jtag Adapter

---
 Readme | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Readme b/Readme
index b4b223a..6ebb306 100644
--- a/Readme
+++ b/Readme
@@ -67,7 +67,7 @@ you can take it from https://github.com/SpinalHDL/SaxonSoc/blob/dev-0.3/bsp/digi
 https://github.com/SpinalHDL/SaxonSoc/blob/dev-0.3/bsp/digilent/ArtyA7SmpLinux/openocd/soc_init.cfg
 You can take it but you need to : set cpu_count to 1 and remove Line 22 to 35.
 
-• Then, after openocd is running, in new terminal, follow the below commands in VexriscvSocSoftware folder ( https://github.com/SpinalHDL/VexRiscvSocSoftware ).
+• Then, after openocd is running, in new terminal, follow the below commands in VexriscvSocSoftware folder ( https://github.com/SpinalHDL/VexRiscvSocSoftware )
 
 • Go to the path VexRiscvSocSoftware/projects/murax/demo/build and then give the below commands :