From 372063582c9285b9069556c8e922aae7276a2710 Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Tue, 23 Oct 2018 19:07:08 +0200 Subject: [PATCH] Improve CsrPlugin CombinatorialPaths --- src/main/scala/vexriscv/plugin/CsrPlugin.scala | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/main/scala/vexriscv/plugin/CsrPlugin.scala b/src/main/scala/vexriscv/plugin/CsrPlugin.scala index 7dc5c78..ad804d1 100644 --- a/src/main/scala/vexriscv/plugin/CsrPlugin.scala +++ b/src/main/scala/vexriscv/plugin/CsrPlugin.scala @@ -643,6 +643,7 @@ class CsrPlugin(config: CsrPluginConfig) extends Plugin[VexRiscv] with Exception interruptJump := interrupt && pipelineLiberator.done val hadException = RegNext(exception) init(False) + pipelineLiberator.done.clearWhen(hadException) val targetPrivilege = CombInit(interruptTargetPrivilege) @@ -666,7 +667,7 @@ class CsrPlugin(config: CsrPluginConfig) extends Plugin[VexRiscv] with Exception } } - when(hadException || (interruptJump && !exception)){ + when(hadException || interruptJump){ jumpInterface.valid := True jumpInterface.payload := (if(!mtvecModeGen) mtvec.base @@ "00" else (mtvec.mode === 0 || hadException) ? (mtvec.base @@ "00") | ((mtvec.base + trapCause) @@ "00") ) memory.arbitration.flushAll := True