From 3b66d986a8f1153595986ce7636b67915bf54d1d Mon Sep 17 00:00:00 2001 From: Charles Papon Date: Sat, 29 Jul 2017 18:20:22 +0200 Subject: [PATCH] Fix cpu sending instruction memory request while being halted by the DebugPlugin --- src/main/scala/vexriscv/plugin/DebugPlugin.scala | 2 +- src/main/scala/vexriscv/plugin/PcManagerSimplePlugin.scala | 5 ++--- .../vexriscv/plugin/SingleInstructionLimiterPlugin.scala | 2 +- src/test/cpp/murax/murax.gtkw | 6 +++--- 4 files changed, 7 insertions(+), 8 deletions(-) diff --git a/src/main/scala/vexriscv/plugin/DebugPlugin.scala b/src/main/scala/vexriscv/plugin/DebugPlugin.scala index a58e618..091a1af 100644 --- a/src/main/scala/vexriscv/plugin/DebugPlugin.scala +++ b/src/main/scala/vexriscv/plugin/DebugPlugin.scala @@ -187,7 +187,7 @@ class DebugPlugin(val debugClockDomain : ClockDomain) extends Plugin[VexRiscv] { } when(haltIt) { - prefetch.arbitration.haltIt := True + prefetch.arbitration.haltItByOther := True } when(stepIt && prefetch.arbitration.isFiring) { diff --git a/src/main/scala/vexriscv/plugin/PcManagerSimplePlugin.scala b/src/main/scala/vexriscv/plugin/PcManagerSimplePlugin.scala index 3407c7b..5b2f40f 100644 --- a/src/main/scala/vexriscv/plugin/PcManagerSimplePlugin.scala +++ b/src/main/scala/vexriscv/plugin/PcManagerSimplePlugin.scala @@ -6,9 +6,8 @@ import spinal.lib._ import scala.collection.mutable.ArrayBuffer -class PcManagerSimplePlugin(resetVector : BigInt, fastPcCalculation : Boolean = false) extends Plugin[VexRiscv] with JumpService{ - - +class PcManagerSimplePlugin(resetVector : BigInt, + fastPcCalculation : Boolean = false) extends Plugin[VexRiscv] with JumpService{ //FetchService interface case class JumpInfo(interface : Flow[UInt], stage: Stage) val jumpInfos = ArrayBuffer[JumpInfo]() diff --git a/src/main/scala/vexriscv/plugin/SingleInstructionLimiterPlugin.scala b/src/main/scala/vexriscv/plugin/SingleInstructionLimiterPlugin.scala index 48c22d7..add7fb7 100644 --- a/src/main/scala/vexriscv/plugin/SingleInstructionLimiterPlugin.scala +++ b/src/main/scala/vexriscv/plugin/SingleInstructionLimiterPlugin.scala @@ -10,6 +10,6 @@ class SingleInstructionLimiterPlugin() extends Plugin[VexRiscv] { import pipeline._ import pipeline.config._ - prefetch.arbitration.haltIt.setWhen(List(fetch,decode,execute,memory,writeBack).map(_.arbitration.isValid).orR) + prefetch.arbitration.haltItByOther.setWhen(List(fetch,decode,execute,memory,writeBack).map(_.arbitration.isValid).orR) } } diff --git a/src/test/cpp/murax/murax.gtkw b/src/test/cpp/murax/murax.gtkw index 32953d3..c73ae3d 100644 --- a/src/test/cpp/murax/murax.gtkw +++ b/src/test/cpp/murax/murax.gtkw @@ -1,10 +1,10 @@ [*] [*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI -[*] Sat Jul 29 00:24:49 2017 +[*] Sat Jul 29 10:39:29 2017 [*] [dumpfile] "/home/spinalvm/Spinal/VexRiscv/src/test/cpp/murax/Murax.vcd" -[dumpfile_mtime] "Sat Jul 29 00:24:44 2017" -[dumpfile_size] 177335125 +[dumpfile_mtime] "Sat Jul 29 10:39:12 2017" +[dumpfile_size] 230220943 [savefile] "/home/spinalvm/Spinal/VexRiscv/src/test/cpp/murax/murax.gtkw" [timestart] 56764536000 [size] 1776 953