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VexRiscv
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add argument for simulation frequency

This commit is contained in:
goekce 2024-11-14 18:12:11 +01:00
parent bd39421664
commit 41ea95f805
1 changed files with 4 additions and 1 deletions
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5
src/main/scala/vexriscv/demo/Murax.scala
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@ -540,7 +540,10 @@ object MuraxWithRamInit{
object MuraxWithRamInitWithNativeJtag{
def main(args: Array[String]) {
SpinalVerilog(Murax(MuraxConfig.default.copy(withNativeJtag = true, onChipRamSize = 4 kB, onChipRamHexFile = "src/main/ressource/hex/muraxDemo.hex")))
val coreFrequency = if (args.nonEmpty) HertzNumber(BigDecimal(args(0))) else MuraxConfig.default.coreFrequency
val (scaledValue, unit) = coreFrequency.decompose
println(s"coreFrequency = $scaledValue $unit")
SpinalVerilog(Murax(MuraxConfig.default.copy(coreFrequency=coreFrequency, withNativeJtag = true, onChipRamSize = 4 kB, onChipRamHexFile = "src/main/ressource/hex/muraxDemo.hex")))
}
}