From 1613191779b0123181b942ef0ab839ca24eda950 Mon Sep 17 00:00:00 2001 From: Tom Verbeure Date: Mon, 28 May 2018 07:18:13 +0000 Subject: [PATCH 1/2] Unrool -> Unroll --- .../scala/vexriscv/plugin/DivPlugin.scala | 2 +- .../plugin/MulDivIterativePlugin.scala | 24 +++++++++---------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/src/main/scala/vexriscv/plugin/DivPlugin.scala b/src/main/scala/vexriscv/plugin/DivPlugin.scala index 2601368..c20dcb3 100644 --- a/src/main/scala/vexriscv/plugin/DivPlugin.scala +++ b/src/main/scala/vexriscv/plugin/DivPlugin.scala @@ -4,7 +4,7 @@ import vexriscv.{VexRiscv, _} import spinal.core._ // DivPlugin was by the past a standalone plugin, but now it use the MulDivIterativePlugin implementation -class DivPlugin extends MulDivIterativePlugin(genMul = false, genDiv = true, mulUnroolFactor = 1, divUnroolFactor = 1) +class DivPlugin extends MulDivIterativePlugin(genMul = false, genDiv = true, mulUnrollFactor = 1, divUnrollFactor = 1) //import spinal.lib.math.MixedDivider // diff --git a/src/main/scala/vexriscv/plugin/MulDivIterativePlugin.scala b/src/main/scala/vexriscv/plugin/MulDivIterativePlugin.scala index 2bf0bf2..356e10f 100644 --- a/src/main/scala/vexriscv/plugin/MulDivIterativePlugin.scala +++ b/src/main/scala/vexriscv/plugin/MulDivIterativePlugin.scala @@ -4,7 +4,7 @@ import spinal.core._ import spinal.lib._ import vexriscv.{VexRiscv, _} -class MulDivIterativePlugin(genMul : Boolean, genDiv : Boolean, mulUnroolFactor : Int, divUnroolFactor : Int) extends Plugin[VexRiscv]{ +class MulDivIterativePlugin(genMul : Boolean, genDiv : Boolean, mulUnrollFactor : Int, divUnrollFactor : Int) extends Plugin[VexRiscv]{ object IS_MUL extends Stageable(Bool) object IS_DIV extends Stageable(Bool) object IS_REM extends Stageable(Bool) @@ -68,17 +68,17 @@ class MulDivIterativePlugin(genMul : Boolean, genDiv : Boolean, mulUnroolFactor val mul = ifGen(genMul) (new Area{ - assert(isPow2(mulUnroolFactor)) - val counter = Counter(32 / mulUnroolFactor + 1) + assert(isPow2(mulUnrollFactor)) + val counter = Counter(32 / mulUnrollFactor + 1) val done = counter.willOverflowIfInc when(arbitration.isValid && input(IS_MUL)){ when(!done){ arbitration.haltItself := True counter.increment() - rs2 := rs2 |>> mulUnroolFactor - val sumElements = ((0 until mulUnroolFactor).map(i => rs2(i) ? (rs1 << i) | U(0)) :+ (accumulator >> 32)) - val sumResult = sumElements.map(_.asSInt.resize(32 + mulUnroolFactor + 1).asUInt).reduceBalancedTree(_ + _) - accumulator := (sumResult @@ accumulator(31 downto 0)) >> mulUnroolFactor + rs2 := rs2 |>> mulUnrollFactor + val sumElements = ((0 until mulUnrollFactor).map(i => rs2(i) ? (rs1 << i) | U(0)) :+ (accumulator >> 32)) + val sumResult = sumElements.map(_.asSInt.resize(32 + mulUnrollFactor + 1).asUInt).reduceBalancedTree(_ + _) + accumulator := (sumResult @@ accumulator(31 downto 0)) >> mulUnrollFactor } output(REGFILE_WRITE_DATA) := ((input(INSTRUCTION)(13 downto 12) === B"00") ? accumulator(31 downto 0) | accumulator(63 downto 32)).asBits } @@ -86,7 +86,7 @@ class MulDivIterativePlugin(genMul : Boolean, genDiv : Boolean, mulUnroolFactor val div = ifGen(genDiv) (new Area{ - assert(isPow2(divUnroolFactor)) + assert(isPow2(divUnrollFactor)) //register allocation def numerator = rs1(31 downto 0) @@ -94,7 +94,7 @@ class MulDivIterativePlugin(genMul : Boolean, genDiv : Boolean, mulUnroolFactor def remainder = accumulator(31 downto 0) val needRevert = Reg(Bool) - val counter = Counter(32 / divUnroolFactor + 2) + val counter = Counter(32 / divUnrollFactor + 2) val done = counter.willOverflowIfInc val result = Reg(Bits(32 bits)) when(arbitration.isValid && input(IS_DIV)){ @@ -116,9 +116,9 @@ class MulDivIterativePlugin(genMul : Boolean, genDiv : Boolean, mulUnroolFactor } } - stages(numerator, remainder, divUnroolFactor) + stages(numerator, remainder, divUnrollFactor) - when(counter === 32 / divUnroolFactor){ + when(counter === 32 / divUnrollFactor){ val selectedResult = (input(INSTRUCTION)(13) ? remainder | numerator) result := selectedResult.twoComplement(needRevert).asBits.resized } @@ -145,4 +145,4 @@ class MulDivIterativePlugin(genMul : Boolean, genDiv : Boolean, mulUnroolFactor } } } -} \ No newline at end of file +} From 0335543309c5fbb576d49b0fdafaeb4fd7eafbb3 Mon Sep 17 00:00:00 2001 From: Tom Verbeure Date: Mon, 28 May 2018 07:20:26 +0000 Subject: [PATCH 2/2] More Unrolls --- src/main/scala/vexriscv/TestsWorkspace.scala | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/main/scala/vexriscv/TestsWorkspace.scala b/src/main/scala/vexriscv/TestsWorkspace.scala index 638af86..6c49b5e 100644 --- a/src/main/scala/vexriscv/TestsWorkspace.scala +++ b/src/main/scala/vexriscv/TestsWorkspace.scala @@ -117,8 +117,8 @@ object TestsWorkspace { new MulDivIterativePlugin( genMul = true, genDiv = true, - mulUnroolFactor = 32, - divUnroolFactor = 1 + mulUnrollFactor = 32, + divUnrollFactor = 1 ), // new DivPlugin, new CsrPlugin(CsrPluginConfig.all(0x80000020l).copy(deterministicInteruptionEntry = false)), @@ -298,4 +298,4 @@ object TestsWorkspace { //TODO MulPlugin doesn't fit well on Artix (FMAX) //TODO PcReg design is unoptimized by Artix synthesis //TODO FMAX SRC mux + bipass mux prioriti -//TODO FMAX, isFiring is to pesimisstinc in some cases(include removeIt flushed ..) \ No newline at end of file +//TODO FMAX, isFiring is to pesimisstinc in some cases(include removeIt flushed ..)