diff --git a/src/main/scala/vexriscv/plugin/PmpPlugin.scala b/src/main/scala/vexriscv/plugin/PmpPlugin.scala index 5f008b4..73c15af 100644 --- a/src/main/scala/vexriscv/plugin/PmpPlugin.scala +++ b/src/main/scala/vexriscv/plugin/PmpPlugin.scala @@ -86,8 +86,8 @@ case class PmpRegister(previous : PmpRegister) extends Area { val addr = UInt(32 bits) } - // Last assignment wins; nothing happens if a user-initiated write did not - // occur on this clock cycle. + // Last valid assignment wins; nothing happens if a user-initiated write did + // not occur on this clock cycle. csr.r := state.r csr.w := state.w csr.x := state.x @@ -97,8 +97,8 @@ case class PmpRegister(previous : PmpRegister) extends Area { // Computed PMP region bounds val region = new Area { - val valid = Bool - val start, end = Reg(UInt(32 bits)) + val valid, locked = Bool + val start, end = UInt(32 bits) } when(~state.l) { @@ -114,32 +114,31 @@ case class PmpRegister(previous : PmpRegister) extends Area { } } - val shifted = csr.addr |<< 2 + val shifted = state.addr |<< 2 + val mask = state.addr & ~(state.addr + 1) + val masked = (state.addr & ~mask) |<< 2 + + // PMP changes take effect two clock cycles after the initial CSR write (i.e., + // settings propagate from csr -> state -> region). + region.locked := state.l region.valid := True - switch(state.a) { + switch(csr.a) { is(TOR) { - if (previous == null) { - region.start := 0 - } else { - region.start := previous.region.end - } + if (previous == null) region.start := 0 + else region.start := previous.region.end region.end := shifted } - is(NA4) { region.start := shifted region.end := shifted + 4 } - is(NAPOT) { - val mask = state.addr & ~(state.addr + 1) - val masked = (state.addr & ~mask) |<< 2 region.start := masked region.end := masked + ((mask + 1) |<< 3) } - default { + region.start := 0 region.end := shifted region.valid := False } @@ -221,7 +220,7 @@ class PmpPlugin(regions : Int, ioRange : UInt => Bool) extends Plugin[VexRiscv] val hits = pmps.map(pmp => pmp.region.valid & pmp.region.start <= address & pmp.region.end > address & - (pmp.state.l | ~privilegeService.isMachine())) + (pmp.region.locked | ~privilegeService.isMachine())) // M-mode has full access by default, others have none. when(CountOne(hits) === 0) { diff --git a/src/test/cpp/raw/pmp/build/pmp.asm b/src/test/cpp/raw/pmp/build/pmp.asm index 5c7605b..4508ee6 100644 --- a/src/test/cpp/raw/pmp/build/pmp.asm +++ b/src/test/cpp/raw/pmp/build/pmp.asm @@ -17,21 +17,21 @@ Disassembly of section .crt_section: 80000018 : 80000018: 00000e13 li t3,0 8000001c: 00000f17 auipc t5,0x0 -80000020: 270f0f13 addi t5,t5,624 # 8000028c +80000020: 27cf0f13 addi t5,t5,636 # 80000298 80000024: 800000b7 lui ra,0x80000 80000028: 80008237 lui tp,0x80008 8000002c: deadc137 lui sp,0xdeadc -80000030: eef10113 addi sp,sp,-273 # deadbeef -80000034: 0020a023 sw sp,0(ra) # 80000000 -80000038: 00222023 sw sp,0(tp) # 80008000 +80000030: eef10113 addi sp,sp,-273 # deadbeef +80000034: 0020a023 sw sp,0(ra) # 80000000 +80000038: 00222023 sw sp,0(tp) # 80008000 8000003c: 0000a183 lw gp,0(ra) -80000040: 24311663 bne sp,gp,8000028c +80000040: 24311c63 bne sp,gp,80000298 80000044: 00022183 lw gp,0(tp) # 0 <_start-0x80000000> -80000048: 24311263 bne sp,gp,8000028c +80000048: 24311863 bne sp,gp,80000298 8000004c: 071202b7 lui t0,0x7120 80000050: 3a029073 csrw pmpcfg0,t0 80000054: 3a002373 csrr t1,pmpcfg0 -80000058: 22629a63 bne t0,t1,8000028c +80000058: 24629063 bne t0,t1,80000298 8000005c: 191f02b7 lui t0,0x191f0 80000060: 30428293 addi t0,t0,772 # 191f0304 <_start-0x66e0fcfc> 80000064: 3a129073 csrw pmpcfg1,t0 @@ -44,7 +44,7 @@ Disassembly of section .crt_section: 80000080: 200002b7 lui t0,0x20000 80000084: 3b029073 csrw pmpaddr0,t0 80000088: 3b002373 csrr t1,pmpaddr0 -8000008c: 20629063 bne t0,t1,8000028c +8000008c: 20629663 bne t0,t1,80000298 80000090: fff00293 li t0,-1 80000094: 3b129073 csrw pmpaddr1,t0 80000098: 200022b7 lui t0,0x20002 @@ -85,116 +85,119 @@ Disassembly of section .crt_section: 80000124: 0020a023 sw sp,0(ra) 80000128: 00222023 sw sp,0(tp) # 0 <_start-0x80000000> 8000012c: 0000a183 lw gp,0(ra) -80000130: 14311e63 bne sp,gp,8000028c +80000130: 16311463 bne sp,gp,80000298 80000134: 00000193 li gp,0 80000138: 00022183 lw gp,0(tp) # 0 <_start-0x80000000> -8000013c: 14311863 bne sp,gp,8000028c +8000013c: 14311e63 bne sp,gp,80000298 80000140 : 80000140: 00100e13 li t3,1 80000144: 00000f17 auipc t5,0x0 -80000148: 148f0f13 addi t5,t5,328 # 8000028c +80000148: 154f0f13 addi t5,t5,340 # 80000298 8000014c: 079212b7 lui t0,0x7921 80000150: 80828293 addi t0,t0,-2040 # 7920808 <_start-0x786df7f8> 80000154: 3a029073 csrw pmpcfg0,t0 80000158: 3a002373 csrr t1,pmpcfg0 -8000015c: 12629863 bne t0,t1,8000028c +8000015c: 12629e63 bne t0,t1,80000298 80000160: 800080b7 lui ra,0x80008 80000164: deadc137 lui sp,0xdeadc -80000168: eef10113 addi sp,sp,-273 # deadbeef -8000016c: 0020a023 sw sp,0(ra) # 80008000 +80000168: eef10113 addi sp,sp,-273 # deadbeef +8000016c: 0020a023 sw sp,0(ra) # 80008000 80000170: 00000f17 auipc t5,0x0 80000174: 010f0f13 addi t5,t5,16 # 80000180 80000178: 0000a183 lw gp,0(ra) -8000017c: 1100006f j 8000028c +8000017c: 11c0006f j 80000298 80000180 : 80000180: 00200e13 li t3,2 80000184: 00000f17 auipc t5,0x0 -80000188: 108f0f13 addi t5,t5,264 # 8000028c +80000188: 114f0f13 addi t5,t5,276 # 80000298 8000018c: 071202b7 lui t0,0x7120 80000190: 3a029073 csrw pmpcfg0,t0 80000194: 3a002373 csrr t1,pmpcfg0 -80000198: 0e628a63 beq t0,t1,8000028c -8000019c: 800080b7 lui ra,0x80008 -800001a0: deadc137 lui sp,0xdeadc -800001a4: eef10113 addi sp,sp,-273 # deadbeef -800001a8: 0020a023 sw sp,0(ra) # 80008000 -800001ac: 00000f17 auipc t5,0x0 -800001b0: 010f0f13 addi t5,t5,16 # 800001bc -800001b4: 0000a183 lw gp,0(ra) -800001b8: 0d40006f j 8000028c +80000198: 3b205073 csrwi pmpaddr2,0 +8000019c: 3b202373 csrr t1,pmpaddr2 +800001a0: 0e030c63 beqz t1,80000298 +800001a4: 0e628a63 beq t0,t1,80000298 +800001a8: 800080b7 lui ra,0x80008 +800001ac: deadc137 lui sp,0xdeadc +800001b0: eef10113 addi sp,sp,-273 # deadbeef +800001b4: 0020a023 sw sp,0(ra) # 80008000 +800001b8: 00000f17 auipc t5,0x0 +800001bc: 010f0f13 addi t5,t5,16 # 800001c8 +800001c0: 0000a183 lw gp,0(ra) +800001c4: 0d40006f j 80000298 -800001bc : -800001bc: 00300e13 li t3,3 -800001c0: 00000f17 auipc t5,0x0 -800001c4: 0ccf0f13 addi t5,t5,204 # 8000028c -800001c8: 00000117 auipc sp,0x0 -800001cc: 01010113 addi sp,sp,16 # 800001d8 -800001d0: 34111073 csrw mepc,sp -800001d4: 30200073 mret +800001c8 : +800001c8: 00300e13 li t3,3 +800001cc: 00000f17 auipc t5,0x0 +800001d0: 0ccf0f13 addi t5,t5,204 # 80000298 +800001d4: 00000117 auipc sp,0x0 +800001d8: 01010113 addi sp,sp,16 # 800001e4 +800001dc: 34111073 csrw mepc,sp +800001e0: 30200073 mret -800001d8 : -800001d8: 00400e13 li t3,4 -800001dc: 00000f17 auipc t5,0x0 -800001e0: 0b0f0f13 addi t5,t5,176 # 8000028c -800001e4: deadc137 lui sp,0xdeadc -800001e8: eef10113 addi sp,sp,-273 # deadbeef -800001ec: 800080b7 lui ra,0x80008 -800001f0: 0020a023 sw sp,0(ra) # 80008000 -800001f4: 00000f17 auipc t5,0x0 -800001f8: 010f0f13 addi t5,t5,16 # 80000204 -800001fc: 0000a183 lw gp,0(ra) -80000200: 08c0006f j 8000028c +800001e4 : +800001e4: 00400e13 li t3,4 +800001e8: 00000f17 auipc t5,0x0 +800001ec: 0b0f0f13 addi t5,t5,176 # 80000298 +800001f0: deadc137 lui sp,0xdeadc +800001f4: eef10113 addi sp,sp,-273 # deadbeef +800001f8: 800080b7 lui ra,0x80008 +800001fc: 0020a023 sw sp,0(ra) # 80008000 +80000200: 00000f17 auipc t5,0x0 +80000204: 010f0f13 addi t5,t5,16 # 80000210 +80000208: 0000a183 lw gp,0(ra) +8000020c: 08c0006f j 80000298 -80000204 : -80000204: 00500e13 li t3,5 -80000208: deadc137 lui sp,0xdeadc -8000020c: eef10113 addi sp,sp,-273 # deadbeef -80000210: 800000b7 lui ra,0x80000 -80000214: 0020a023 sw sp,0(ra) # 80000000 -80000218: 0000a183 lw gp,0(ra) -8000021c: 06311863 bne sp,gp,8000028c +80000210 : +80000210: 00500e13 li t3,5 +80000214: deadc137 lui sp,0xdeadc +80000218: eef10113 addi sp,sp,-273 # deadbeef +8000021c: 800000b7 lui ra,0x80000 +80000220: 0020a023 sw sp,0(ra) # 80000000 +80000224: 0000a183 lw gp,0(ra) +80000228: 06311863 bne sp,gp,80000298 -80000220 : -80000220: 00600e13 li t3,6 -80000224: 800100b7 lui ra,0x80010 -80000228: 0000a183 lw gp,0(ra) # 80010000 -8000022c: 00000f17 auipc t5,0x0 -80000230: 06cf0f13 addi t5,t5,108 # 80000298 -80000234: 0030a023 sw gp,0(ra) -80000238: 0540006f j 8000028c +8000022c : +8000022c: 00600e13 li t3,6 +80000230: 800100b7 lui ra,0x80010 +80000234: 0000a183 lw gp,0(ra) # 80010000 +80000238: 00000f17 auipc t5,0x0 +8000023c: 06cf0f13 addi t5,t5,108 # 800002a4 +80000240: 0030a023 sw gp,0(ra) +80000244: 0540006f j 80000298 -8000023c : -8000023c: 00700e13 li t3,7 -80000240: 00000f17 auipc t5,0x0 -80000244: 04cf0f13 addi t5,t5,76 # 8000028c -80000248: deadc137 lui sp,0xdeadc -8000024c: eef10113 addi sp,sp,-273 # deadbeef -80000250: 800300b7 lui ra,0x80030 -80000254: ff808093 addi ra,ra,-8 # 8002fff8 -80000258: 00222023 sw sp,0(tp) # 0 <_start-0x80000000> -8000025c: 00000f17 auipc t5,0x0 -80000260: fa8f0f13 addi t5,t5,-88 # 80000204 -80000264: 00022183 lw gp,0(tp) # 0 <_start-0x80000000> -80000268: 0240006f j 8000028c +80000248 : +80000248: 00700e13 li t3,7 +8000024c: 00000f17 auipc t5,0x0 +80000250: 04cf0f13 addi t5,t5,76 # 80000298 +80000254: deadc137 lui sp,0xdeadc +80000258: eef10113 addi sp,sp,-273 # deadbeef +8000025c: 800300b7 lui ra,0x80030 +80000260: ff808093 addi ra,ra,-8 # 8002fff8 +80000264: 00222023 sw sp,0(tp) # 0 <_start-0x80000000> +80000268: 00000f17 auipc t5,0x0 +8000026c: fa8f0f13 addi t5,t5,-88 # 80000210 +80000270: 00022183 lw gp,0(tp) # 0 <_start-0x80000000> +80000274: 0240006f j 80000298 -8000026c : -8000026c: 00800e13 li t3,8 -80000270: 800400b7 lui ra,0x80040 -80000274: ff808093 addi ra,ra,-8 # 8003fff8 -80000278: 0000a183 lw gp,0(ra) -8000027c: 00000f17 auipc t5,0x0 -80000280: 01cf0f13 addi t5,t5,28 # 80000298 -80000284: 0030a023 sw gp,0(ra) -80000288: 0040006f j 8000028c +80000278 : +80000278: 00800e13 li t3,8 +8000027c: 800400b7 lui ra,0x80040 +80000280: ff808093 addi ra,ra,-8 # 8003fff8 +80000284: 0000a183 lw gp,0(ra) +80000288: 00000f17 auipc t5,0x0 +8000028c: 01cf0f13 addi t5,t5,28 # 800002a4 +80000290: 0030a023 sw gp,0(ra) +80000294: 0040006f j 80000298 -8000028c : -8000028c: f0100137 lui sp,0xf0100 -80000290: f2410113 addi sp,sp,-220 # f00fff24 -80000294: 01c12023 sw t3,0(sp) - -80000298 : +80000298 : 80000298: f0100137 lui sp,0xf0100 -8000029c: f2010113 addi sp,sp,-224 # f00fff20 -800002a0: 00012023 sw zero,0(sp) +8000029c: f2410113 addi sp,sp,-220 # f00fff24 +800002a0: 01c12023 sw t3,0(sp) + +800002a4 : +800002a4: f0100137 lui sp,0xf0100 +800002a8: f2010113 addi sp,sp,-224 # f00fff20 +800002ac: 00012023 sw zero,0(sp) diff --git a/src/test/cpp/raw/pmp/build/pmp.elf b/src/test/cpp/raw/pmp/build/pmp.elf index 8900721..b844a20 100755 Binary files a/src/test/cpp/raw/pmp/build/pmp.elf and b/src/test/cpp/raw/pmp/build/pmp.elf differ diff --git a/src/test/cpp/raw/pmp/build/pmp.hex b/src/test/cpp/raw/pmp/build/pmp.hex index 0a8fd79..8197935 100644 --- a/src/test/cpp/raw/pmp/build/pmp.hex +++ b/src/test/cpp/raw/pmp/build/pmp.hex @@ -1,13 +1,13 @@ :0200000480007A :100000009700000093800001739050306F00C00093 :1000100073101F3473002030130E0000170F000000 -:10002000130F0F27B70000803782008037C1ADDE85 +:10002000130FCF27B70000803782008037C1ADDEC5 :100030001301F1EE23A020002320220083A1000061 -:10004000631631248321020063123124B7021207A0 -:100050007390023A7323003A639A6222B7021F191F +:10004000631C31248321020063183124B702120794 +:100050007390023A7323003A63906224B7021F1927 :10006000938242307390123AB7020F00938262502B :100070007390223AB7221E0F938202907390323A05 -:10008000B70200207390023B7323003B6390622011 +:10008000B70200207390023B7323003B639662200B :100090009302F0FF7390123BB72200207390223B33 :1000A000B74200209382F2FF7390323BB7420020A8 :1000B0009382F2FF7390423BB74200209382F2FF9B @@ -18,29 +18,29 @@ :100100007390C23B930200007390D23B93020000B5 :100110007390E23B930200007390F23B3701C10001 :100120001301E1FE23A020002320220083A1000070 -:10013000631E3114930100008321020063183114FF -:10014000130E1000170F0000130F8F14B712920731 -:10015000938282807390023A7323003A639862120A +:10013000631431169301000083210200631E311401 +:10014000130E1000170F0000130F4F15B712920770 +:10015000938282807390023A7323003A639E621204 :10016000B780008037C1ADDE1301F1EE23A020007F -:10017000170F0000130F0F0183A100006F00001183 -:10018000130E2000170F0000130F8F10B702120775 -:100190007390023A7323003A638A620EB78000803C -:1001A00037C1ADDE1301F1EE23A02000170F0000D0 -:1001B000130F0F0183A100006F00400D130E3000DC -:1001C000170F0000130FCF0C1701000013010101DE -:1001D0007310113473002030130E4000170F00000D -:1001E000130F0F0B37C1ADDE1301F1EEB7800080A6 -:1001F00023A02000170F0000130F0F0183A10000A0 -:100200006F00C008130E500037C1ADDE1301F1EED0 -:10021000B700008023A0200083A1000063183106EE -:10022000130E6000B700018083A10000170F0000CB -:10023000130FCF0623A030006F004005130E70008F -:10024000170F0000130FCF0437C1ADDE1301F1EE1D -:10025000B7000380938080FF23202200170F000047 -:10026000130F8FFA832102006F004002130E8000EB -:10027000B7000480938080FF83A10000170F000067 -:10028000130FCF0123A030006F004000370110F0A2 -:10029000130141F22320C101370110F0130101F2D3 -:0402A0002320010016 +:10017000170F0000130F0F0183A100006F00C011C3 +:10018000130E2000170F0000130F4F11B7021207B4 +:100190007390023A7323003A7350203B7323203B41 +:1001A000630C030E638A620EB780008037C1ADDE38 +:1001B0001301F1EE23A02000170F0000130F0F0111 +:1001C00083A100006F00400D130E3000170F0000D8 +:1001D000130FCF0C1701000013010101731011342C +:1001E00073002030130E4000170F0000130F0F0B89 +:1001F00037C1ADDE1301F1EEB780008023A02000EF +:10020000170F0000130F0F0183A100006F00C0083B +:10021000130E500037C1ADDE1301F1EEB7000080C0 +:1002200023A0200083A1000063183106130E600094 +:10023000B700018083A10000170F0000130FCF0645 +:1002400023A030006F004005130E7000170F000050 +:10025000130FCF0437C1ADDE1301F1EEB7000380F9 +:10026000938080FF23202200170F0000130F8FFAC6 +:10027000832102006F004002130E8000B70004804B +:10028000938080FF83A10000170F0000130FCF01A0 +:1002900023A030006F004000370110F0130141F23D +:1002A0002320C101370110F0130101F223200100C6 :040000058000000077 :00000001FF diff --git a/src/test/cpp/raw/pmp/build/pmp.map b/src/test/cpp/raw/pmp/build/pmp.map index bc9aeef..2a01820 100644 --- a/src/test/cpp/raw/pmp/build/pmp.map +++ b/src/test/cpp/raw/pmp/build/pmp.map @@ -15,19 +15,19 @@ LOAD /opt/riscv/lib/gcc/riscv64-unknown-elf/10.2.0/../../../../riscv64-unknown-e END GROUP LOAD /opt/riscv/lib/gcc/riscv64-unknown-elf/10.2.0/libgcc.a -.crt_section 0x0000000080000000 0x2a4 +.crt_section 0x0000000080000000 0x2b0 0x0000000080000000 . = ALIGN (0x4) *crt.o(.text) - .text 0x0000000080000000 0x2a4 build/src/crt.o + .text 0x0000000080000000 0x2b0 build/src/crt.o 0x0000000080000000 _start 0x0000000080000010 trap OUTPUT(build/pmp.elf elf32-littleriscv) -.data 0x00000000800002a4 0x0 - .data 0x00000000800002a4 0x0 build/src/crt.o +.data 0x00000000800002b0 0x0 + .data 0x00000000800002b0 0x0 build/src/crt.o -.bss 0x00000000800002a4 0x0 - .bss 0x00000000800002a4 0x0 build/src/crt.o +.bss 0x00000000800002b0 0x0 + .bss 0x00000000800002b0 0x0 build/src/crt.o .riscv.attributes 0x0000000000000000 0x1e diff --git a/src/test/cpp/raw/pmp/src/crt.S b/src/test/cpp/raw/pmp/src/crt.S index 01cd306..76ee02f 100644 --- a/src/test/cpp/raw/pmp/src/crt.S +++ b/src/test/cpp/raw/pmp/src/crt.S @@ -132,6 +132,9 @@ test2: li x5, PMPCFG0 csrw pmpcfg0, x5 // "unlock" region 2 csrr x6, pmpcfg0 + csrwi pmpaddr2, 0x0 + csrr x6, pmpaddr2 + beqz x6, fail beq x5, x6, fail li x1, 0x80008000 li x2, 0xdeadbeef