From 714d44d24889fd59eaae47d9ae3f39890fe2d5e8 Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Tue, 7 Nov 2017 13:54:07 +0100 Subject: [PATCH] Add fixed bug into the FormalPlugin comments --- src/main/scala/vexriscv/plugin/FomalPlugin.scala | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/main/scala/vexriscv/plugin/FomalPlugin.scala b/src/main/scala/vexriscv/plugin/FomalPlugin.scala index d8a543b..b7bbff3 100644 --- a/src/main/scala/vexriscv/plugin/FomalPlugin.scala +++ b/src/main/scala/vexriscv/plugin/FomalPlugin.scala @@ -54,12 +54,13 @@ case class RvfiPort() extends Bundle with IMasterSlave { //Halt CPU on decoding exception //VexRiscv changes -//input(INSTRUCTION)(5) REGFILE_WRITE_VALID +// //VexRiscv bug //1) pcManagerService.createJumpInterface(pipeline.execute) // pcManagerService.createJumpInterface(if(earlyBranch) pipeline.execute else pipeline.memory) //2) JALR => clear PC(0) +//3) input(INSTRUCTION)(5) REGFILE_WRITE_VALID memory read with exception would not fire properly class FomalPlugin extends Plugin[VexRiscv]{