From 7ae218704e0e1849395e9bd64f58f34ce391b88d Mon Sep 17 00:00:00 2001 From: Charles Papon Date: Tue, 19 Nov 2019 18:36:42 +0100 Subject: [PATCH] CsrPlugin now implement a IWake interface DebugPlugin now wake the CPU if a halt is asked to flush the pipeline --- src/main/scala/vexriscv/plugin/CsrPlugin.scala | 13 +++++++++++-- src/main/scala/vexriscv/plugin/DebugPlugin.scala | 5 +++++ 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/src/main/scala/vexriscv/plugin/CsrPlugin.scala b/src/main/scala/vexriscv/plugin/CsrPlugin.scala index c93eaf7..0c9b7dc 100644 --- a/src/main/scala/vexriscv/plugin/CsrPlugin.scala +++ b/src/main/scala/vexriscv/plugin/CsrPlugin.scala @@ -311,8 +311,11 @@ trait CsrInterface{ trait IContextSwitching{ def isContextSwitching : Bool } +trait IWake{ + def askWake() : Unit +} -class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with ExceptionService with PrivilegeService with InterruptionInhibitor with ExceptionInhibitor with IContextSwitching with CsrInterface{ +class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with ExceptionService with PrivilegeService with InterruptionInhibitor with ExceptionInhibitor with IContextSwitching with CsrInterface with IWake{ import config._ import CsrAccess._ @@ -338,6 +341,10 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep var privilege : UInt = null var selfException : Flow[ExceptionCause] = null var contextSwitching : Bool = null + var thirdPartyWake : Bool = null + + override def askWake(): Unit = thirdPartyWake := True + override def isContextSwitching = contextSwitching object EnvCtrlEnum extends SpinalEnum(binarySequential){ @@ -378,6 +385,8 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep override def setup(pipeline: VexRiscv): Unit = { import pipeline.config._ + thirdPartyWake = False + val defaultEnv = List[(Stageable[_ <: BaseType],Any)]( ) @@ -886,7 +895,7 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep import execute._ //Manage WFI instructions val inWfi = False.addTag(Verilator.public) - val wfiWake = RegNext(interruptSpecs.map(_.cond).orR) init(False) + val wfiWake = RegNext(interruptSpecs.map(_.cond).orR || thirdPartyWake) init(False) if(wfiGenAsWait) when(arbitration.isValid && input(ENV_CTRL) === EnvCtrlEnum.WFI){ inWfi := True when(!wfiWake){ diff --git a/src/main/scala/vexriscv/plugin/DebugPlugin.scala b/src/main/scala/vexriscv/plugin/DebugPlugin.scala index 4088cec..1b0084b 100644 --- a/src/main/scala/vexriscv/plugin/DebugPlugin.scala +++ b/src/main/scala/vexriscv/plugin/DebugPlugin.scala @@ -246,6 +246,11 @@ class DebugPlugin(val debugClockDomain : ClockDomain, hardwareBreakpointCount : } if(pipeline.things.contains(DEBUG_BYPASS_CACHE)) pipeline(DEBUG_BYPASS_CACHE) := True } + + val wakeService = serviceElse(classOf[IWake], null) + if(wakeService != null) when(haltIt){ + wakeService.askWake() + } }} } }