From 805bd560776c638c78c30c73833d5efbaea2d8f2 Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Fri, 30 Jul 2021 16:51:07 +0200 Subject: [PATCH] Fix VexRiscvBmbGenerator.hardwareBreakpointCount default value --- src/main/scala/vexriscv/VexRiscvBmbGenerator.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/vexriscv/VexRiscvBmbGenerator.scala b/src/main/scala/vexriscv/VexRiscvBmbGenerator.scala index 9bd8d94..723ea7d 100644 --- a/src/main/scala/vexriscv/VexRiscvBmbGenerator.scala +++ b/src/main/scala/vexriscv/VexRiscvBmbGenerator.scala @@ -25,7 +25,7 @@ case class VexRiscvBmbGenerator()(implicit interconnectSmp: BmbInterconnectGener val debugClockDomain = Handle[ClockDomain] val debugReset = Handle[Bool] val debugAskReset = Handle[() => Unit] - val hardwareBreakpointCount = Handle(0) + val hardwareBreakpointCount = Handle.sync(0) val iBus, dBus = Handle[Bmb]