diff --git a/src/main/scala/vexriscv/plugin/PmpPlugin.scala b/src/main/scala/vexriscv/plugin/PmpPlugin.scala index 88be675..5f008b4 100644 --- a/src/main/scala/vexriscv/plugin/PmpPlugin.scala +++ b/src/main/scala/vexriscv/plugin/PmpPlugin.scala @@ -70,61 +70,78 @@ case class PmpRegister(previous : PmpRegister) extends Area { def NA4 = 2 def NAPOT = 3 - // Software-accessible CSR interface - val csr = new Area { + val state = new Area { val r, w, x = Reg(Bool) val l = RegInit(False) val a = Reg(UInt(2 bits)) init(0) val addr = Reg(UInt(32 bits)) } - // Active region bounds and permissions (internal) + // CSR writes connect to these signals rather than the internal state + // registers. This makes locking and WARL possible. + val csr = new Area { + val r, w, x = Bool + val l = Bool + val a = UInt(2 bits) + val addr = UInt(32 bits) + } + + // Last assignment wins; nothing happens if a user-initiated write did not + // occur on this clock cycle. + csr.r := state.r + csr.w := state.w + csr.x := state.x + csr.l := state.l + csr.a := state.a + csr.addr := state.addr + + // Computed PMP region bounds val region = new Area { - val r, w, x = Reg(Bool) - val l, valid = RegInit(False) + val valid = Bool val start, end = Reg(UInt(32 bits)) } - - when(~region.l) { - region.r := csr.r - region.w := csr.w - region.x := csr.x - region.l := csr.l - val shifted = csr.addr |<< 2 - region.valid := True + when(~state.l) { + state.r := csr.r + state.w := csr.w + state.x := csr.x + state.l := csr.l + state.a := csr.a + state.addr := csr.addr - switch(csr.a) { + if (csr.l == True & csr.a == TOR) { + previous.state.l := True + } + } - is(TOR) { - if (previous == null) { - region.start := 0 - } else { - region.start := previous.region.end - } - if (csr.l == True) { - previous.region.l := True - } - region.end := shifted + val shifted = csr.addr |<< 2 + region.valid := True + + switch(state.a) { + is(TOR) { + if (previous == null) { + region.start := 0 + } else { + region.start := previous.region.end } + region.end := shifted + } - is(NA4) { - region.start := shifted - region.end := shifted + 4 - } + is(NA4) { + region.start := shifted + region.end := shifted + 4 + } - is(NAPOT) { - val mask = csr.addr & ~(csr.addr + 1) - val masked = (csr.addr & ~mask) |<< 2 - region.start := masked - region.end := masked + ((mask + 1) |<< 3) - } - - default { - region.end := shifted - region.valid := False - } + is(NAPOT) { + val mask = state.addr & ~(state.addr + 1) + val masked = (state.addr & ~mask) |<< 2 + region.start := masked + region.end := masked + ((mask + 1) |<< 3) + } + default { + region.end := shifted + region.valid := False } } } @@ -162,12 +179,25 @@ class PmpPlugin(regions : Int, ioRange : UInt => Bool) extends Plugin[VexRiscv] } else { pmps += PmpRegister(pmps.last) } - csrService.rw(0x3b0 + i, pmps(i).csr.addr) + csrService.r(0x3b0 + i, pmps(i).state.addr) + csrService.w(0x3b0 + i, pmps(i).csr.addr) } // Instantiate pmpcfg0 ... pmpcfg# CSRs. for (i <- 0 until (regions / 4)) { - csrService.rw(0x3a0 + i, + csrService.r(0x3a0 + i, + 31 -> pmps((i * 4) + 3).state.l, 23 -> pmps((i * 4) + 2).state.l, + 15 -> pmps((i * 4) + 1).state.l, 7 -> pmps((i * 4) ).state.l, + 27 -> pmps((i * 4) + 3).state.a, 26 -> pmps((i * 4) + 3).state.x, + 25 -> pmps((i * 4) + 3).state.w, 24 -> pmps((i * 4) + 3).state.r, + 19 -> pmps((i * 4) + 2).state.a, 18 -> pmps((i * 4) + 2).state.x, + 17 -> pmps((i * 4) + 2).state.w, 16 -> pmps((i * 4) + 2).state.r, + 11 -> pmps((i * 4) + 1).state.a, 10 -> pmps((i * 4) + 1).state.x, + 9 -> pmps((i * 4) + 1).state.w, 8 -> pmps((i * 4) + 1).state.r, + 3 -> pmps((i * 4) ).state.a, 2 -> pmps((i * 4) ).state.x, + 1 -> pmps((i * 4) ).state.w, 0 -> pmps((i * 4) ).state.r + ) + csrService.w(0x3a0 + i, 31 -> pmps((i * 4) + 3).csr.l, 23 -> pmps((i * 4) + 2).csr.l, 15 -> pmps((i * 4) + 1).csr.l, 7 -> pmps((i * 4) ).csr.l, 27 -> pmps((i * 4) + 3).csr.a, 26 -> pmps((i * 4) + 3).csr.x, @@ -188,10 +218,10 @@ class PmpPlugin(regions : Int, ioRange : UInt => Bool) extends Plugin[VexRiscv] port.bus.rsp.physicalAddress := address // Only the first matching PMP region applies. - val hits = pmps.map(pmp => pmp.region.valid && - pmp.region.start <= address && - pmp.region.end > address && - (pmp.region.l || ~privilegeService.isMachine())) + val hits = pmps.map(pmp => pmp.region.valid & + pmp.region.start <= address & + pmp.region.end > address & + (pmp.state.l | ~privilegeService.isMachine())) // M-mode has full access by default, others have none. when(CountOne(hits) === 0) { @@ -199,9 +229,9 @@ class PmpPlugin(regions : Int, ioRange : UInt => Bool) extends Plugin[VexRiscv] port.bus.rsp.allowWrite := privilegeService.isMachine() port.bus.rsp.allowExecute := privilegeService.isMachine() } otherwise { - port.bus.rsp.allowRead := MuxOH(OHMasking.first(hits), pmps.map(_.region.r)) - port.bus.rsp.allowWrite := MuxOH(OHMasking.first(hits), pmps.map(_.region.w)) - port.bus.rsp.allowExecute := MuxOH(OHMasking.first(hits), pmps.map(_.region.x)) + port.bus.rsp.allowRead := MuxOH(OHMasking.first(hits), pmps.map(_.state.r)) + port.bus.rsp.allowWrite := MuxOH(OHMasking.first(hits), pmps.map(_.state.w)) + port.bus.rsp.allowExecute := MuxOH(OHMasking.first(hits), pmps.map(_.state.x)) } port.bus.rsp.isIoAccess := ioRange(port.bus.rsp.physicalAddress) diff --git a/src/test/cpp/raw/pmp/build/pmp.asm b/src/test/cpp/raw/pmp/build/pmp.asm index 294e964..5c7605b 100644 --- a/src/test/cpp/raw/pmp/build/pmp.asm +++ b/src/test/cpp/raw/pmp/build/pmp.asm @@ -17,176 +17,184 @@ Disassembly of section .crt_section: 80000018 : 80000018: 00000e13 li t3,0 8000001c: 00000f17 auipc t5,0x0 -80000020: 250f0f13 addi t5,t5,592 # 8000026c +80000020: 270f0f13 addi t5,t5,624 # 8000028c 80000024: 800000b7 lui ra,0x80000 80000028: 80008237 lui tp,0x80008 8000002c: deadc137 lui sp,0xdeadc -80000030: eef10113 addi sp,sp,-273 # deadbeef -80000034: 0020a023 sw sp,0(ra) # 80000000 -80000038: 00222023 sw sp,0(tp) # 80008000 +80000030: eef10113 addi sp,sp,-273 # deadbeef +80000034: 0020a023 sw sp,0(ra) # 80000000 +80000038: 00222023 sw sp,0(tp) # 80008000 8000003c: 0000a183 lw gp,0(ra) -80000040: 22311663 bne sp,gp,8000026c +80000040: 24311663 bne sp,gp,8000028c 80000044: 00022183 lw gp,0(tp) # 0 <_start-0x80000000> -80000048: 22311263 bne sp,gp,8000026c +80000048: 24311263 bne sp,gp,8000028c 8000004c: 071202b7 lui t0,0x7120 80000050: 3a029073 csrw pmpcfg0,t0 -80000054: 191f02b7 lui t0,0x191f0 -80000058: 30428293 addi t0,t0,772 # 191f0304 <_start-0x66e0fcfc> -8000005c: 3a129073 csrw pmpcfg1,t0 -80000060: 000f02b7 lui t0,0xf0 -80000064: 50628293 addi t0,t0,1286 # f0506 <_start-0x7ff0fafa> -80000068: 3a229073 csrw pmpcfg2,t0 -8000006c: 0f1e22b7 lui t0,0xf1e2 -80000070: 90028293 addi t0,t0,-1792 # f1e1900 <_start-0x70e1e700> -80000074: 3a329073 csrw pmpcfg3,t0 -80000078: 200002b7 lui t0,0x20000 -8000007c: 3b029073 csrw pmpaddr0,t0 -80000080: fff00293 li t0,-1 -80000084: 3b129073 csrw pmpaddr1,t0 -80000088: 200022b7 lui t0,0x20002 -8000008c: 3b229073 csrw pmpaddr2,t0 -80000090: 200042b7 lui t0,0x20004 -80000094: fff28293 addi t0,t0,-1 # 20003fff <_start-0x5fffc001> -80000098: 3b329073 csrw pmpaddr3,t0 -8000009c: 200042b7 lui t0,0x20004 -800000a0: fff28293 addi t0,t0,-1 # 20003fff <_start-0x5fffc001> -800000a4: 3b429073 csrw pmpaddr4,t0 -800000a8: 200042b7 lui t0,0x20004 -800000ac: fff28293 addi t0,t0,-1 # 20003fff <_start-0x5fffc001> -800000b0: 3b529073 csrw pmpaddr5,t0 -800000b4: 200022b7 lui t0,0x20002 -800000b8: fff28293 addi t0,t0,-1 # 20001fff <_start-0x5fffe001> -800000bc: 3b629073 csrw pmpaddr6,t0 -800000c0: 200062b7 lui t0,0x20006 -800000c4: fff28293 addi t0,t0,-1 # 20005fff <_start-0x5fffa001> -800000c8: 3b729073 csrw pmpaddr7,t0 -800000cc: 2000c2b7 lui t0,0x2000c -800000d0: 3b829073 csrw pmpaddr8,t0 -800000d4: 2000d2b7 lui t0,0x2000d -800000d8: 3b929073 csrw pmpaddr9,t0 -800000dc: fff00293 li t0,-1 -800000e0: 3ba29073 csrw pmpaddr10,t0 -800000e4: 00000293 li t0,0 -800000e8: 3bb29073 csrw pmpaddr11,t0 -800000ec: 00000293 li t0,0 -800000f0: 3bc29073 csrw pmpaddr12,t0 +80000054: 3a002373 csrr t1,pmpcfg0 +80000058: 22629a63 bne t0,t1,8000028c +8000005c: 191f02b7 lui t0,0x191f0 +80000060: 30428293 addi t0,t0,772 # 191f0304 <_start-0x66e0fcfc> +80000064: 3a129073 csrw pmpcfg1,t0 +80000068: 000f02b7 lui t0,0xf0 +8000006c: 50628293 addi t0,t0,1286 # f0506 <_start-0x7ff0fafa> +80000070: 3a229073 csrw pmpcfg2,t0 +80000074: 0f1e22b7 lui t0,0xf1e2 +80000078: 90028293 addi t0,t0,-1792 # f1e1900 <_start-0x70e1e700> +8000007c: 3a329073 csrw pmpcfg3,t0 +80000080: 200002b7 lui t0,0x20000 +80000084: 3b029073 csrw pmpaddr0,t0 +80000088: 3b002373 csrr t1,pmpaddr0 +8000008c: 20629063 bne t0,t1,8000028c +80000090: fff00293 li t0,-1 +80000094: 3b129073 csrw pmpaddr1,t0 +80000098: 200022b7 lui t0,0x20002 +8000009c: 3b229073 csrw pmpaddr2,t0 +800000a0: 200042b7 lui t0,0x20004 +800000a4: fff28293 addi t0,t0,-1 # 20003fff <_start-0x5fffc001> +800000a8: 3b329073 csrw pmpaddr3,t0 +800000ac: 200042b7 lui t0,0x20004 +800000b0: fff28293 addi t0,t0,-1 # 20003fff <_start-0x5fffc001> +800000b4: 3b429073 csrw pmpaddr4,t0 +800000b8: 200042b7 lui t0,0x20004 +800000bc: fff28293 addi t0,t0,-1 # 20003fff <_start-0x5fffc001> +800000c0: 3b529073 csrw pmpaddr5,t0 +800000c4: 200022b7 lui t0,0x20002 +800000c8: fff28293 addi t0,t0,-1 # 20001fff <_start-0x5fffe001> +800000cc: 3b629073 csrw pmpaddr6,t0 +800000d0: 200062b7 lui t0,0x20006 +800000d4: fff28293 addi t0,t0,-1 # 20005fff <_start-0x5fffa001> +800000d8: 3b729073 csrw pmpaddr7,t0 +800000dc: 2000c2b7 lui t0,0x2000c +800000e0: 3b829073 csrw pmpaddr8,t0 +800000e4: 2000d2b7 lui t0,0x2000d +800000e8: 3b929073 csrw pmpaddr9,t0 +800000ec: fff00293 li t0,-1 +800000f0: 3ba29073 csrw pmpaddr10,t0 800000f4: 00000293 li t0,0 -800000f8: 3bd29073 csrw pmpaddr13,t0 +800000f8: 3bb29073 csrw pmpaddr11,t0 800000fc: 00000293 li t0,0 -80000100: 3be29073 csrw pmpaddr14,t0 +80000100: 3bc29073 csrw pmpaddr12,t0 80000104: 00000293 li t0,0 -80000108: 3bf29073 csrw pmpaddr15,t0 -8000010c: 00c10137 lui sp,0xc10 -80000110: fee10113 addi sp,sp,-18 # c0ffee <_start-0x7f3f0012> -80000114: 0020a023 sw sp,0(ra) -80000118: 00222023 sw sp,0(tp) # 0 <_start-0x80000000> -8000011c: 0000a183 lw gp,0(ra) -80000120: 14311663 bne sp,gp,8000026c -80000124: 00000193 li gp,0 -80000128: 00022183 lw gp,0(tp) # 0 <_start-0x80000000> -8000012c: 14311063 bne sp,gp,8000026c +80000108: 3bd29073 csrw pmpaddr13,t0 +8000010c: 00000293 li t0,0 +80000110: 3be29073 csrw pmpaddr14,t0 +80000114: 00000293 li t0,0 +80000118: 3bf29073 csrw pmpaddr15,t0 +8000011c: 00c10137 lui sp,0xc10 +80000120: fee10113 addi sp,sp,-18 # c0ffee <_start-0x7f3f0012> +80000124: 0020a023 sw sp,0(ra) +80000128: 00222023 sw sp,0(tp) # 0 <_start-0x80000000> +8000012c: 0000a183 lw gp,0(ra) +80000130: 14311e63 bne sp,gp,8000028c +80000134: 00000193 li gp,0 +80000138: 00022183 lw gp,0(tp) # 0 <_start-0x80000000> +8000013c: 14311863 bne sp,gp,8000028c -80000130 : -80000130: 00100e13 li t3,1 -80000134: 00000f17 auipc t5,0x0 -80000138: 138f0f13 addi t5,t5,312 # 8000026c -8000013c: 079212b7 lui t0,0x7921 -80000140: 80828293 addi t0,t0,-2040 # 7920808 <_start-0x786df7f8> -80000144: 3a029073 csrw pmpcfg0,t0 -80000148: 800080b7 lui ra,0x80008 -8000014c: deadc137 lui sp,0xdeadc -80000150: eef10113 addi sp,sp,-273 # deadbeef -80000154: 0020a023 sw sp,0(ra) # 80008000 -80000158: 00000f17 auipc t5,0x0 -8000015c: 010f0f13 addi t5,t5,16 # 80000168 -80000160: 0000a183 lw gp,0(ra) -80000164: 1080006f j 8000026c +80000140 : +80000140: 00100e13 li t3,1 +80000144: 00000f17 auipc t5,0x0 +80000148: 148f0f13 addi t5,t5,328 # 8000028c +8000014c: 079212b7 lui t0,0x7921 +80000150: 80828293 addi t0,t0,-2040 # 7920808 <_start-0x786df7f8> +80000154: 3a029073 csrw pmpcfg0,t0 +80000158: 3a002373 csrr t1,pmpcfg0 +8000015c: 12629863 bne t0,t1,8000028c +80000160: 800080b7 lui ra,0x80008 +80000164: deadc137 lui sp,0xdeadc +80000168: eef10113 addi sp,sp,-273 # deadbeef +8000016c: 0020a023 sw sp,0(ra) # 80008000 +80000170: 00000f17 auipc t5,0x0 +80000174: 010f0f13 addi t5,t5,16 # 80000180 +80000178: 0000a183 lw gp,0(ra) +8000017c: 1100006f j 8000028c -80000168 : -80000168: 00200e13 li t3,2 -8000016c: 00000f17 auipc t5,0x0 -80000170: 100f0f13 addi t5,t5,256 # 8000026c -80000174: 071202b7 lui t0,0x7120 -80000178: 3a029073 csrw pmpcfg0,t0 -8000017c: 800080b7 lui ra,0x80008 -80000180: deadc137 lui sp,0xdeadc -80000184: eef10113 addi sp,sp,-273 # deadbeef -80000188: 0020a023 sw sp,0(ra) # 80008000 -8000018c: 00000f17 auipc t5,0x0 -80000190: 010f0f13 addi t5,t5,16 # 8000019c -80000194: 0000a183 lw gp,0(ra) -80000198: 0d40006f j 8000026c +80000180 : +80000180: 00200e13 li t3,2 +80000184: 00000f17 auipc t5,0x0 +80000188: 108f0f13 addi t5,t5,264 # 8000028c +8000018c: 071202b7 lui t0,0x7120 +80000190: 3a029073 csrw pmpcfg0,t0 +80000194: 3a002373 csrr t1,pmpcfg0 +80000198: 0e628a63 beq t0,t1,8000028c +8000019c: 800080b7 lui ra,0x80008 +800001a0: deadc137 lui sp,0xdeadc +800001a4: eef10113 addi sp,sp,-273 # deadbeef +800001a8: 0020a023 sw sp,0(ra) # 80008000 +800001ac: 00000f17 auipc t5,0x0 +800001b0: 010f0f13 addi t5,t5,16 # 800001bc +800001b4: 0000a183 lw gp,0(ra) +800001b8: 0d40006f j 8000028c -8000019c : -8000019c: 00300e13 li t3,3 -800001a0: 00000f17 auipc t5,0x0 -800001a4: 0ccf0f13 addi t5,t5,204 # 8000026c -800001a8: 00000117 auipc sp,0x0 -800001ac: 01010113 addi sp,sp,16 # 800001b8 -800001b0: 34111073 csrw mepc,sp -800001b4: 30200073 mret +800001bc : +800001bc: 00300e13 li t3,3 +800001c0: 00000f17 auipc t5,0x0 +800001c4: 0ccf0f13 addi t5,t5,204 # 8000028c +800001c8: 00000117 auipc sp,0x0 +800001cc: 01010113 addi sp,sp,16 # 800001d8 +800001d0: 34111073 csrw mepc,sp +800001d4: 30200073 mret -800001b8 : -800001b8: 00400e13 li t3,4 -800001bc: 00000f17 auipc t5,0x0 -800001c0: 0b0f0f13 addi t5,t5,176 # 8000026c -800001c4: deadc137 lui sp,0xdeadc -800001c8: eef10113 addi sp,sp,-273 # deadbeef -800001cc: 800080b7 lui ra,0x80008 -800001d0: 0020a023 sw sp,0(ra) # 80008000 -800001d4: 00000f17 auipc t5,0x0 -800001d8: 010f0f13 addi t5,t5,16 # 800001e4 -800001dc: 0000a183 lw gp,0(ra) -800001e0: 08c0006f j 8000026c +800001d8 : +800001d8: 00400e13 li t3,4 +800001dc: 00000f17 auipc t5,0x0 +800001e0: 0b0f0f13 addi t5,t5,176 # 8000028c +800001e4: deadc137 lui sp,0xdeadc +800001e8: eef10113 addi sp,sp,-273 # deadbeef +800001ec: 800080b7 lui ra,0x80008 +800001f0: 0020a023 sw sp,0(ra) # 80008000 +800001f4: 00000f17 auipc t5,0x0 +800001f8: 010f0f13 addi t5,t5,16 # 80000204 +800001fc: 0000a183 lw gp,0(ra) +80000200: 08c0006f j 8000028c -800001e4 : -800001e4: 00500e13 li t3,5 -800001e8: deadc137 lui sp,0xdeadc -800001ec: eef10113 addi sp,sp,-273 # deadbeef -800001f0: 800000b7 lui ra,0x80000 -800001f4: 0020a023 sw sp,0(ra) # 80000000 -800001f8: 0000a183 lw gp,0(ra) -800001fc: 06311863 bne sp,gp,8000026c +80000204 : +80000204: 00500e13 li t3,5 +80000208: deadc137 lui sp,0xdeadc +8000020c: eef10113 addi sp,sp,-273 # deadbeef +80000210: 800000b7 lui ra,0x80000 +80000214: 0020a023 sw sp,0(ra) # 80000000 +80000218: 0000a183 lw gp,0(ra) +8000021c: 06311863 bne sp,gp,8000028c -80000200 : -80000200: 00600e13 li t3,6 -80000204: 800100b7 lui ra,0x80010 -80000208: 0000a183 lw gp,0(ra) # 80010000 -8000020c: 00000f17 auipc t5,0x0 -80000210: 06cf0f13 addi t5,t5,108 # 80000278 -80000214: 0030a023 sw gp,0(ra) -80000218: 0540006f j 8000026c +80000220 : +80000220: 00600e13 li t3,6 +80000224: 800100b7 lui ra,0x80010 +80000228: 0000a183 lw gp,0(ra) # 80010000 +8000022c: 00000f17 auipc t5,0x0 +80000230: 06cf0f13 addi t5,t5,108 # 80000298 +80000234: 0030a023 sw gp,0(ra) +80000238: 0540006f j 8000028c -8000021c : -8000021c: 00700e13 li t3,7 -80000220: 00000f17 auipc t5,0x0 -80000224: 04cf0f13 addi t5,t5,76 # 8000026c -80000228: deadc137 lui sp,0xdeadc -8000022c: eef10113 addi sp,sp,-273 # deadbeef -80000230: 800300b7 lui ra,0x80030 -80000234: ff808093 addi ra,ra,-8 # 8002fff8 -80000238: 00222023 sw sp,0(tp) # 0 <_start-0x80000000> -8000023c: 00000f17 auipc t5,0x0 -80000240: fa8f0f13 addi t5,t5,-88 # 800001e4 -80000244: 00022183 lw gp,0(tp) # 0 <_start-0x80000000> -80000248: 0240006f j 8000026c - -8000024c : -8000024c: 00800e13 li t3,8 -80000250: 800400b7 lui ra,0x80040 -80000254: ff808093 addi ra,ra,-8 # 8003fff8 -80000258: 0000a183 lw gp,0(ra) +8000023c : +8000023c: 00700e13 li t3,7 +80000240: 00000f17 auipc t5,0x0 +80000244: 04cf0f13 addi t5,t5,76 # 8000028c +80000248: deadc137 lui sp,0xdeadc +8000024c: eef10113 addi sp,sp,-273 # deadbeef +80000250: 800300b7 lui ra,0x80030 +80000254: ff808093 addi ra,ra,-8 # 8002fff8 +80000258: 00222023 sw sp,0(tp) # 0 <_start-0x80000000> 8000025c: 00000f17 auipc t5,0x0 -80000260: 01cf0f13 addi t5,t5,28 # 80000278 -80000264: 0030a023 sw gp,0(ra) -80000268: 0040006f j 8000026c +80000260: fa8f0f13 addi t5,t5,-88 # 80000204 +80000264: 00022183 lw gp,0(tp) # 0 <_start-0x80000000> +80000268: 0240006f j 8000028c -8000026c : -8000026c: f0100137 lui sp,0xf0100 -80000270: f2410113 addi sp,sp,-220 # f00fff24 -80000274: 01c12023 sw t3,0(sp) +8000026c : +8000026c: 00800e13 li t3,8 +80000270: 800400b7 lui ra,0x80040 +80000274: ff808093 addi ra,ra,-8 # 8003fff8 +80000278: 0000a183 lw gp,0(ra) +8000027c: 00000f17 auipc t5,0x0 +80000280: 01cf0f13 addi t5,t5,28 # 80000298 +80000284: 0030a023 sw gp,0(ra) +80000288: 0040006f j 8000028c -80000278 : -80000278: f0100137 lui sp,0xf0100 -8000027c: f2010113 addi sp,sp,-224 # f00fff20 -80000280: 00012023 sw zero,0(sp) +8000028c : +8000028c: f0100137 lui sp,0xf0100 +80000290: f2410113 addi sp,sp,-220 # f00fff24 +80000294: 01c12023 sw t3,0(sp) + +80000298 : +80000298: f0100137 lui sp,0xf0100 +8000029c: f2010113 addi sp,sp,-224 # f00fff20 +800002a0: 00012023 sw zero,0(sp) diff --git a/src/test/cpp/raw/pmp/build/pmp.elf b/src/test/cpp/raw/pmp/build/pmp.elf index 75d1010..8900721 100755 Binary files a/src/test/cpp/raw/pmp/build/pmp.elf and b/src/test/cpp/raw/pmp/build/pmp.elf differ diff --git a/src/test/cpp/raw/pmp/build/pmp.hex b/src/test/cpp/raw/pmp/build/pmp.hex index e3fdeab..0a8fd79 100644 --- a/src/test/cpp/raw/pmp/build/pmp.hex +++ b/src/test/cpp/raw/pmp/build/pmp.hex @@ -1,44 +1,46 @@ :0200000480007A :100000009700000093800001739050306F00C00093 :1000100073101F3473002030130E0000170F000000 -:10002000130F0F25B70000803782008037C1ADDE87 +:10002000130F0F27B70000803782008037C1ADDE85 :100030001301F1EE23A020002320220083A1000061 -:10004000631631228321020063123122B7021207A4 -:100050007390023AB7021F19938242307390123A9A -:10006000B7020F00938262507390223AB7221E0F9C -:10007000938202907390323AB70200207390023B51 -:100080009302F0FF7390123BB72200207390223B43 -:10009000B74200209382F2FF7390323BB7420020B8 -:1000A0009382F2FF7390423BB74200209382F2FFAB -:1000B0007390523BB72200209382F2FF7390623B11 -:1000C000B76200209382F2FF7390723BB7C20020A8 -:1000D0007390823BB7D200207390923B9302F0FF63 -:1000E0007390A23B930200007390B23B9302000016 -:1000F0007390C23B930200007390D23B93020000C6 -:100100007390E23B930200007390F23B3701C10011 -:100110001301E1FE23A020002320220083A1000080 -:10012000631631149301000083210200631031141F -:10013000130E1000170F0000130F8F13B712920742 -:10014000938282807390023AB780008037C1ADDE1F -:100150001301F1EE23A02000170F0000130F0F0171 -:1001600083A100006F008010130E2000170F000005 -:10017000130F0F10B70212077390023AB780008076 -:1001800037C1ADDE1301F1EE23A02000170F0000F0 -:10019000130F0F0183A100006F00400D130E3000FC -:1001A000170F0000130FCF0C1701000013010101FE -:1001B0007310113473002030130E4000170F00002D -:1001C000130F0F0B37C1ADDE1301F1EEB7800080C6 -:1001D00023A02000170F0000130F0F0183A10000C0 -:1001E0006F00C008130E500037C1ADDE1301F1EEF1 -:1001F000B700008023A0200083A10000631831060F -:10020000130E6000B700018083A10000170F0000EB -:10021000130FCF0623A030006F004005130E7000AF -:10022000170F0000130FCF0437C1ADDE1301F1EE3D -:10023000B7000380938080FF23202200170F000067 -:10024000130F8FFA832102006F004002130E80000B -:10025000B7000480938080FF83A10000170F000087 -:10026000130FCF0123A030006F004000370110F0C2 -:10027000130141F22320C101370110F0130101F2F3 -:040280002320010036 +:10004000631631248321020063123124B7021207A0 +:100050007390023A7323003A639A6222B7021F191F +:10006000938242307390123AB7020F00938262502B +:100070007390223AB7221E0F938202907390323A05 +:10008000B70200207390023B7323003B6390622011 +:100090009302F0FF7390123BB72200207390223B33 +:1000A000B74200209382F2FF7390323BB7420020A8 +:1000B0009382F2FF7390423BB74200209382F2FF9B +:1000C0007390523BB72200209382F2FF7390623B01 +:1000D000B76200209382F2FF7390723BB7C2002098 +:1000E0007390823BB7D200207390923B9302F0FF53 +:1000F0007390A23B930200007390B23B9302000006 +:100100007390C23B930200007390D23B93020000B5 +:100110007390E23B930200007390F23B3701C10001 +:100120001301E1FE23A020002320220083A1000070 +:10013000631E3114930100008321020063183114FF +:10014000130E1000170F0000130F8F14B712920731 +:10015000938282807390023A7323003A639862120A +:10016000B780008037C1ADDE1301F1EE23A020007F +:10017000170F0000130F0F0183A100006F00001183 +:10018000130E2000170F0000130F8F10B702120775 +:100190007390023A7323003A638A620EB78000803C +:1001A00037C1ADDE1301F1EE23A02000170F0000D0 +:1001B000130F0F0183A100006F00400D130E3000DC +:1001C000170F0000130FCF0C1701000013010101DE +:1001D0007310113473002030130E4000170F00000D +:1001E000130F0F0B37C1ADDE1301F1EEB7800080A6 +:1001F00023A02000170F0000130F0F0183A10000A0 +:100200006F00C008130E500037C1ADDE1301F1EED0 +:10021000B700008023A0200083A1000063183106EE +:10022000130E6000B700018083A10000170F0000CB +:10023000130FCF0623A030006F004005130E70008F +:10024000170F0000130FCF0437C1ADDE1301F1EE1D +:10025000B7000380938080FF23202200170F000047 +:10026000130F8FFA832102006F004002130E8000EB +:10027000B7000480938080FF83A10000170F000067 +:10028000130FCF0123A030006F004000370110F0A2 +:10029000130141F22320C101370110F0130101F2D3 +:0402A0002320010016 :040000058000000077 :00000001FF diff --git a/src/test/cpp/raw/pmp/build/pmp.map b/src/test/cpp/raw/pmp/build/pmp.map index 1ba7c62..bc9aeef 100644 --- a/src/test/cpp/raw/pmp/build/pmp.map +++ b/src/test/cpp/raw/pmp/build/pmp.map @@ -15,19 +15,19 @@ LOAD /opt/riscv/lib/gcc/riscv64-unknown-elf/10.2.0/../../../../riscv64-unknown-e END GROUP LOAD /opt/riscv/lib/gcc/riscv64-unknown-elf/10.2.0/libgcc.a -.crt_section 0x0000000080000000 0x284 +.crt_section 0x0000000080000000 0x2a4 0x0000000080000000 . = ALIGN (0x4) *crt.o(.text) - .text 0x0000000080000000 0x284 build/src/crt.o + .text 0x0000000080000000 0x2a4 build/src/crt.o 0x0000000080000000 _start 0x0000000080000010 trap OUTPUT(build/pmp.elf elf32-littleriscv) -.data 0x0000000080000284 0x0 - .data 0x0000000080000284 0x0 build/src/crt.o +.data 0x00000000800002a4 0x0 + .data 0x00000000800002a4 0x0 build/src/crt.o -.bss 0x0000000080000284 0x0 - .bss 0x0000000080000284 0x0 build/src/crt.o +.bss 0x00000000800002a4 0x0 + .bss 0x00000000800002a4 0x0 build/src/crt.o .riscv.attributes 0x0000000000000000 0x1e diff --git a/src/test/cpp/raw/pmp/src/crt.S b/src/test/cpp/raw/pmp/src/crt.S index 47d36b7..01cd306 100644 --- a/src/test/cpp/raw/pmp/src/crt.S +++ b/src/test/cpp/raw/pmp/src/crt.S @@ -58,6 +58,8 @@ test0: li x5, PMPCFG0 csrw pmpcfg0, x5 + csrr x6, pmpcfg0 + bne x5, x6, fail li x5, PMPCFG1 csrw pmpcfg1, x5 li x5, PMPCFG2 @@ -66,6 +68,8 @@ test0: csrw pmpcfg3, x5 li x5, PMPADDR0 csrw pmpaddr0, x5 + csrr x6, pmpaddr0 + bne x5, x6, fail li x5, PMPADDR1 csrw pmpaddr1, x5 li x5, PMPADDR2 @@ -112,6 +116,8 @@ test1: la TRAP_RA, fail li x5, PMPCFG0_ csrw pmpcfg0, x5 // lock region 2 + csrr x6, pmpcfg0 + bne x5, x6, fail li x1, 0x80008000 li x2, 0xdeadbeef sw x2, 0x0(x1) // should be OK (write 0x80008000) @@ -125,6 +131,8 @@ test2: la TRAP_RA, fail li x5, PMPCFG0 csrw pmpcfg0, x5 // "unlock" region 2 + csrr x6, pmpcfg0 + beq x5, x6, fail li x1, 0x80008000 li x2, 0xdeadbeef sw x2, 0x0(x1) // should still be OK (write 0x80008000)