diff --git a/src/main/scala/vexriscv/demo/Linux.scala b/src/main/scala/vexriscv/demo/Linux.scala
index 1f6513d..96ace43 100644
--- a/src/main/scala/vexriscv/demo/Linux.scala
+++ b/src/main/scala/vexriscv/demo/Linux.scala
@@ -88,7 +88,6 @@ https://github.com/riscv/riscv-qemu/wiki#build-and-install
 */
 
 
-//TODO test dcache flush
 //TODO have to check, look like supervisor can't get interrupt if the machine mod didn't delegated it, have to check exactly
 //TODO IBus cached and uncached, do not allow supervisor if it's a user page ? io.cpu.fetch.mmuException
 object LinuxGen {