From 967a0c4cafa46986f40f5303a63b5dae3efccd4d Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Thu, 8 Feb 2018 01:01:14 +0100 Subject: [PATCH] Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 9093297..5925282 100644 --- a/README.md +++ b/README.md @@ -40,7 +40,7 @@ The hardware description of this CPU is done by using an very software oriented - There is an automatic a tool which allow plugins to insert data in the pipeline at a given stage, and allow other plugins to read it in another stages through automatic pipelining. - There is an service system which provide a very dynamic framework. As instance, a plugin could provide an exception service which could then be used by others plugins to emit exceptions from the pipeline. -There is a gitter channel for all questions about VexRiscv : +There is a gitter channel for all questions about VexRiscv :
[![Gitter](https://badges.gitter.im/SpinalHDL/VexRiscv.svg)](https://gitter.im/SpinalHDL/VexRiscv?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge) ## Area usage and maximal frequency