From 978232fd63ba339a451e0451d393bfaee82e8230 Mon Sep 17 00:00:00 2001
From: Dolu1990 <charles.papon.90@gmail.com>
Date: Sat, 3 Nov 2018 11:12:37 +0100
Subject: [PATCH] Optimise div iterative plugin done signal

---
 src/main/scala/vexriscv/plugin/MulDivIterativePlugin.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/main/scala/vexriscv/plugin/MulDivIterativePlugin.scala b/src/main/scala/vexriscv/plugin/MulDivIterativePlugin.scala
index 3dd668b..717ad7f 100644
--- a/src/main/scala/vexriscv/plugin/MulDivIterativePlugin.scala
+++ b/src/main/scala/vexriscv/plugin/MulDivIterativePlugin.scala
@@ -95,7 +95,7 @@ class MulDivIterativePlugin(genMul : Boolean = true, genDiv : Boolean = true, mu
 
         val needRevert = Reg(Bool)
         val counter = Counter(32 / divUnrollFactor + 2)
-        val done = counter.willOverflowIfInc
+        val done = Reg(Bool) setWhen(counter === counter.end-1) clearWhen(!arbitration.isStuck)
         val result = Reg(Bits(32 bits))
         when(arbitration.isValid && input(IS_DIV)){
           when(!done){