From 9abe19317def428a36ecead853b0a06ff2f5a425 Mon Sep 17 00:00:00 2001
From: Dolu1990 <charles.papon.90@gmail.com>
Date: Mon, 2 Nov 2020 17:01:17 +0100
Subject: [PATCH] RegFilePlugin.x0Init do less assumption on other plugin
 behaviour

---
 src/main/scala/vexriscv/plugin/RegFilePlugin.scala | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/src/main/scala/vexriscv/plugin/RegFilePlugin.scala b/src/main/scala/vexriscv/plugin/RegFilePlugin.scala
index a34dc46..0b7bcd2 100644
--- a/src/main/scala/vexriscv/plugin/RegFilePlugin.scala
+++ b/src/main/scala/vexriscv/plugin/RegFilePlugin.scala
@@ -105,14 +105,9 @@ class RegFilePlugin(regFileReadyKind : RegFileReadKind,
       if(x0Init) {
         val boot = RegNext(False) init (True)
         regFileWrite.valid setWhen (boot)
-        if (writeStage != execute) {
-          inputInit[Bits](REGFILE_WRITE_DATA, 0)
-          inputInit[Bits](INSTRUCTION, 0)
-        } else {
-          when(boot) {
-            regFileWrite.address := 0
-            regFileWrite.data := 0
-          }
+        when(boot) {
+          regFileWrite.address := 0
+          regFileWrite.data := 0
         }
       }
     }