From 9b9d9e2582536b768e084ea19af62f9aab74fa55 Mon Sep 17 00:00:00 2001 From: Charles Papon Date: Sat, 10 Jun 2017 16:09:14 +0200 Subject: [PATCH] Add Uart monitor in the briey testbench --- src/test/cpp/briey/main.cpp | 103 ++++++++++++++++++++++++++++++------ src/test/cpp/briey/makefile | 4 ++ src/test/cpp/briey/wip.gtkw | 60 +++++++++++++++++++++ 3 files changed, 151 insertions(+), 16 deletions(-) create mode 100644 src/test/cpp/briey/wip.gtkw diff --git a/src/test/cpp/briey/main.cpp b/src/test/cpp/briey/main.cpp index 50324a4..84fbeda 100644 --- a/src/test/cpp/briey/main.cpp +++ b/src/test/cpp/briey/main.cpp @@ -30,12 +30,12 @@ public: }; //#include -class Process{ +class TimeProcess{ public: uint64_t wakeDelay = 0; bool wakeEnable = false; // std::function lambda; - virtual ~Process(){} + virtual ~TimeProcess(){} virtual void schedule(uint64_t delay){ wakeDelay = delay; wakeEnable = true; @@ -47,7 +47,16 @@ public: }; -class ClockDomain : public Process{ +class SensitiveProcess{ +public: + + virtual ~SensitiveProcess(){} + virtual void tick(uint64_t time){ + + } +}; + +class ClockDomain : public TimeProcess{ public: CData* clk; CData* reset; @@ -91,7 +100,7 @@ public: }; -class AsyncReset : public Process{ +class AsyncReset : public TimeProcess{ public: CData* reset; uint32_t state; @@ -144,7 +153,7 @@ bool SetSocketBlockingEnabled(int fd, bool blocking) #endif } -class Jtag : public Process{ +class Jtag : public TimeProcess{ public: CData *tms, *tdi, *tdo, *tck; enum State {reset}; @@ -268,7 +277,8 @@ class success : public std::exception { }; class Workspace{ public: static uint32_t cycles; - vector processes; + vector timeProcesses; + vector checkProcesses; VBriey* top; bool resetDone = false; double timeToSec = 1e-12; @@ -294,7 +304,8 @@ public: delete tfp; #endif - for(Process* p : processes) delete p; + for(auto* p : timeProcesses) delete p; + for(auto* p : checkProcesses) delete p; } @@ -338,7 +349,7 @@ public: try { while(1){ uint64_t delay = ~0l; - for(Process* p : processes) + for(TimeProcess* p : timeProcesses) if(p->wakeEnable && p->wakeDelay < delay) delay = p->wakeDelay; @@ -348,7 +359,7 @@ public: if(delay != 0){ dump(time); } - for(Process* p : processes) { + for(TimeProcess* p : timeProcesses) { p->wakeDelay -= delay; if(p->wakeDelay == 0){ p->wakeEnable = false; @@ -357,7 +368,7 @@ public: } top->eval(); - + for(auto* p : checkProcesses) p->tick(time); if(delay != 0){ if(time - tickLastSimTime > 1000*400000 || time - tickLastSimTime > 1.0*speedFactor/timeToSec){ @@ -366,7 +377,9 @@ public: uint64_t diffInNanos = end_time.tv_sec*1e9 + end_time.tv_nsec - tick_time.tv_sec*1e9 - tick_time.tv_nsec; tick_time = end_time; double dt = diffInNanos*1e-9; - printf("Simulation speed : %f ms/realTime\n",(time - tickLastSimTime)/dt*timeToSec*1e3); + #ifdef PRINT_PERF + printf("Simulation speed : %f ms/realTime\n",(time - tickLastSimTime)/dt*timeToSec*1e3); + #endif tickLastSimTime = time; } time += delay; @@ -387,7 +400,7 @@ public: if(flushCounter > 100000){ #ifdef TRACE tfp->flush(); - printf("flush\n"); + //printf("flush\n"); #endif flushCounter = 0; } @@ -620,6 +633,62 @@ public: } }; +class UartRx : public SensitiveProcess{ +public: + + CData *rx; + uint32_t uartTimeRate; + UartRx(CData *rx, uint32_t uartTimeRate){ + this->rx = rx; + this->uartTimeRate = uartTimeRate; + } + + enum State {START, DATA, STOP,START_SUCCESS}; + State state = START; + uint64_t holdTime = 0; + CData holdValue; + char data; + uint32_t counter; + virtual void tick(uint64_t time){ + if(time < holdTime){ + if(*rx != holdValue){ + cout << "UART RX FRAME ERROR" << endl; + holdTime = time; + state = START; + } + }else{ + switch(state){ + case START: + case START_SUCCESS: + if(state == START_SUCCESS){ + cout << data << flush; + state = START; + } + if(*rx == 0 && time > uartTimeRate){ + holdTime = time + uartTimeRate; + holdValue = *rx; + state = DATA; + counter = 0; + data = 0; + } + break; + case DATA: + data |= (*rx) << counter++; + if(counter == 8){ + state = STOP; + } + holdValue = *rx; + holdTime = time + uartTimeRate; + break; + case STOP: + holdTime = time + uartTimeRate; + holdValue = 1; + state = START_SUCCESS; + break; + } + } + } +}; class BrieyWorkspace : public Workspace{ public: @@ -628,10 +697,12 @@ public: ClockDomain *vgaClk = new ClockDomain(&top->io_vgaClk,NULL,40000,100000); AsyncReset *asyncReset = new AsyncReset(&top->io_asyncReset,50000); Jtag *jtag = new Jtag(&top->io_jtag_tms,&top->io_jtag_tdi,&top->io_jtag_tdo,&top->io_jtag_tck,60000); - processes.push_back(axiClk); - processes.push_back(vgaClk); - processes.push_back(asyncReset); - processes.push_back(jtag); + UartRx *uartRx = new UartRx(&top->io_uart_txd,(50000000/8/115200)*8*axiClk->tooglePeriod*2); + timeProcesses.push_back(axiClk); + timeProcesses.push_back(vgaClk); + timeProcesses.push_back(asyncReset); + timeProcesses.push_back(jtag); + checkProcesses.push_back(uartRx); SdramConfig *sdramConfig = new SdramConfig( 2, //byteCount diff --git a/src/test/cpp/briey/makefile b/src/test/cpp/briey/makefile index 39d43a5..ebff23d 100644 --- a/src/test/cpp/briey/makefile +++ b/src/test/cpp/briey/makefile @@ -1,5 +1,6 @@ DEBUG?=no TRACE?=no +PRINT_PERF?=no TRACE_START=0 ADDCFLAGS += -CFLAGS -pthread @@ -13,6 +14,9 @@ endif ifneq ($(DEBUG),yes) ADDCFLAGS += -CFLAGS "-O3" endif +ifeq ($(PRINT_PERF),yes) + ADDCFLAGS += -CFLAGS -DPRINT_PERF +endif ADDCFLAGS += -CFLAGS -DTRACE_START=${TRACE_START} diff --git a/src/test/cpp/briey/wip.gtkw b/src/test/cpp/briey/wip.gtkw new file mode 100644 index 0000000..040658a --- /dev/null +++ b/src/test/cpp/briey/wip.gtkw @@ -0,0 +1,60 @@ +[*] +[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI +[*] Sat Jun 10 13:47:38 2017 +[*] +[dumpfile] "/home/spinalvm/Spinal/VexRiscv/src/test/cpp/briey/Briey.vcd" +[dumpfile_mtime] "Sat Jun 10 13:46:48 2017" +[dumpfile_size] 485915260 +[savefile] "/home/spinalvm/Spinal/VexRiscv/src/test/cpp/briey/wip.gtkw" +[timestart] 0 +[size] 1776 953 +[pos] -775 -353 +*-18.000000 260000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +[treeopen] TOP. +[treeopen] TOP.Briey. +[treeopen] TOP.Briey.axi_uartCtrl. +[sst_width] 269 +[signals_width] 310 +[sst_expanded] 1 +[sst_vpaned_height] 503 +@28 +TOP.Briey.axi_uartCtrl.io_axiClk +@22 +TOP.Briey.axi_uartCtrl.io_apb_PADDR[3:0] +@28 +TOP.Briey.axi_uartCtrl.io_apb_PENABLE +@22 +TOP.Briey.axi_uartCtrl.io_apb_PRDATA[31:0] +@28 +TOP.Briey.axi_uartCtrl.io_apb_PREADY +TOP.Briey.axi_uartCtrl.io_apb_PSEL[0] +@22 +TOP.Briey.axi_uartCtrl.io_apb_PWDATA[31:0] +@28 +TOP.Briey.axi_uartCtrl.io_apb_PWRITE +@24 +TOP.Briey.axi_uartCtrl.uartCtrl_1.io_config_clockDivider[19:0] +@28 +TOP.Briey.axi_uartCtrl.uartCtrl_1.io_config_frame_dataLength[2:0] +TOP.Briey.axi_uartCtrl.uartCtrl_1.io_config_frame_parity[1:0] +TOP.Briey.axi_uartCtrl.uartCtrl_1.io_config_frame_stop[0] +TOP.Briey.axi_uartCtrl.uartCtrl_1.io_uart_txd +@22 +TOP.Briey.axi_core_cpu.DebugPlugin_busReadDataReg[31:0] +@28 +TOP.Briey.axi_core_cpu.DebugPlugin_firstCycle +TOP.Briey.axi_core_cpu.DebugPlugin_haltIt +TOP.Briey.axi_core_cpu.DebugPlugin_haltedByBreak +TOP.Briey.axi_core_cpu.DebugPlugin_insertDecodeInstruction +TOP.Briey.axi_core_cpu.DebugPlugin_isPipActive +TOP.Briey.axi_core_cpu.DebugPlugin_isPipBusy +TOP.Briey.axi_core_cpu.DebugPlugin_resetIt +TOP.Briey.axi_core_cpu.DebugPlugin_stepIt +TOP.Briey.axi_core_cpu.decode_IS_EBREAK +TOP.Briey.axi_core_cpu.decode_arbitration_isValid +@22 +TOP.Briey.axi_core_cpu.decode_PC[31:0] +@23 +TOP.Briey.axi_core_cpu.decode_INSTRUCTION[31:0] +[pattern_trace] 1 +[pattern_trace] 0