From df03c99ab2a851c612d945afcc7165a8898b282c Mon Sep 17 00:00:00 2001 From: occheung Date: Tue, 19 Oct 2021 11:39:25 +0800 Subject: [PATCH 1/2] pmp_setter: fix mask generation --- src/main/scala/vexriscv/plugin/PmpPlugin.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/vexriscv/plugin/PmpPlugin.scala b/src/main/scala/vexriscv/plugin/PmpPlugin.scala index 1084891..54029d6 100644 --- a/src/main/scala/vexriscv/plugin/PmpPlugin.scala +++ b/src/main/scala/vexriscv/plugin/PmpPlugin.scala @@ -90,7 +90,7 @@ class PmpSetter(cutoff : Int) extends Component with Pmp { val ones = io.addr & ~(io.addr + 1) io.base := io.addr(xlen - 3 downto cutoff - 2) ^ ones(xlen - 3 downto cutoff - 2) - io.mask := ~ones(xlen - 2 downto cutoff - 1) + io.mask := ~(ones(xlen - 4 downto cutoff - 2) @@ U"1") } case class ProtectedMemoryTranslatorPort(bus : MemoryTranslatorBus) From a3807660e37074215001a598a41bc84734438a58 Mon Sep 17 00:00:00 2001 From: occheung Date: Tue, 19 Oct 2021 11:40:39 +0800 Subject: [PATCH 2/2] pmp perm: revert to mux for priority --- src/main/scala/vexriscv/plugin/PmpPlugin.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/vexriscv/plugin/PmpPlugin.scala b/src/main/scala/vexriscv/plugin/PmpPlugin.scala index 54029d6..35951e5 100644 --- a/src/main/scala/vexriscv/plugin/PmpPlugin.scala +++ b/src/main/scala/vexriscv/plugin/PmpPlugin.scala @@ -259,7 +259,7 @@ class PmpPlugin(regions : Int, granularity : Int, ioRange : UInt => Bool) extend } def getPermission(hits : IndexedSeq[Bool], bit : Int) = { - (hits zip state.pmpcfg).map({ case (i, cfg) => i & cfg(bit) }).orR + MuxOH(OHMasking.first(hits), state.pmpcfg.map(_(bit))) } val dGuard = new Area {