diff --git a/src/main/scala/vexriscv/plugin/CsrPlugin.scala b/src/main/scala/vexriscv/plugin/CsrPlugin.scala
index 2204a65..afe3e6c 100644
--- a/src/main/scala/vexriscv/plugin/CsrPlugin.scala
+++ b/src/main/scala/vexriscv/plugin/CsrPlugin.scala
@@ -1692,11 +1692,11 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep
           }
 
           //When no PMP =>
-//          if(!csrMapping.mapping.contains(0x3A0)){
-//            when(arbitration.isValid && input(IS_CSR) && U(csrAddress) >= 0x3A0 && U(csrAddress) <= 0x3EF){
-//              csrMapping.allowCsrSignal := True
-//            }
-//          }
+          if(!csrMapping.mapping.contains(0x3A0)){
+            when(arbitration.isValid && input(IS_CSR) && (csrAddress(11 downto 2) ## B"00" === 0x3A0  || csrAddress(11 downto 4) ## B"0000" === 0x3B0)){
+              csrMapping.allowCsrSignal := True
+            }
+          }
 
           illegalAccess clearWhen(csrMapping.allowCsrSignal)
 
diff --git a/src/test/cpp/regression/main.cpp b/src/test/cpp/regression/main.cpp
index 3bbd26c..1f20d00 100644
--- a/src/test/cpp/regression/main.cpp
+++ b/src/test/cpp/regression/main.cpp
@@ -630,7 +630,7 @@ public:
 		#endif
 
 		default: {
-//            if(csr >= 0x3A0 && csr <= 0x3EF) break; //PMP
+            if(csr >= 0x3A0 && csr <= 0x3A3 || csr >= 0x3B0 && csr <= 0x3BF) break; //PMP
             return true;
 		}break;
 		}
@@ -686,7 +686,7 @@ public:
 		#endif
 
 		default: {
-//            if(csr >= 0x3A0 && csr <= 0x3EF) break; //PMP
+            if(csr >= 0x3A0 && csr <= 0x3A3 || csr >= 0x3B0 && csr <= 0x3BF) break; //PMP
             ilegalInstruction();
             return true;
 		}break;