From be18d8fa5a4b0152c92d6882ad26929f6ee1d2ba Mon Sep 17 00:00:00 2001 From: Charles Papon Date: Sat, 21 Sep 2019 10:28:52 +0200 Subject: [PATCH] CSR access enables are also impacted by the MMU memory access --- src/main/scala/vexriscv/plugin/CsrPlugin.scala | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/src/main/scala/vexriscv/plugin/CsrPlugin.scala b/src/main/scala/vexriscv/plugin/CsrPlugin.scala index b6b43ca..5c7e032 100644 --- a/src/main/scala/vexriscv/plugin/CsrPlugin.scala +++ b/src/main/scala/vexriscv/plugin/CsrPlugin.scala @@ -945,14 +945,9 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep val readData = B(0, 32 bits) val writeInstruction = arbitration.isValid && input(IS_CSR) && input(CSR_WRITE_OPCODE) val readInstruction = arbitration.isValid && input(IS_CSR) && input(CSR_READ_OPCODE) - val writeEnable = writeInstruction && ! blockedBySideEffects // && readDataRegValid - val readEnable = readInstruction && ! blockedBySideEffects // && !readDataRegValid + val writeEnable = writeInstruction && ! blockedBySideEffects && !arbitration.isStuckByOthers// && readDataRegValid + val readEnable = readInstruction && ! blockedBySideEffects && !arbitration.isStuckByOthers// && !readDataRegValid //arbitration.isStuckByOthers, in case of the hazardPlugin is in the executeStage - val hazardStage = service(classOf[RegFileService]).readStage() - if(hazardStage == execute) when (arbitration.isStuckByOthers){ - writeEnable := False - readEnable := False - } // def readDataReg = memory.input(REGFILE_WRITE_DATA) //PIPE OPT