From cb5597818d10f5c19a394d8ffa62a9f3a12ad374 Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Sun, 7 Jun 2020 11:29:07 +0200 Subject: [PATCH] Fix d$ generation crash --- src/main/scala/vexriscv/ip/DataCache.scala | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/main/scala/vexriscv/ip/DataCache.scala b/src/main/scala/vexriscv/ip/DataCache.scala index 8d02a40..65f2918 100644 --- a/src/main/scala/vexriscv/ip/DataCache.scala +++ b/src/main/scala/vexriscv/ip/DataCache.scala @@ -983,7 +983,8 @@ class DataCache(val p : DataCacheConfig, mmuParameter : MemoryTranslatorBusParam when(bypassCache){ io.cpu.writeBack.data := ioMemRspMuxed - if(catchAccessError) io.cpu.writeBack.accessError := !request.wr && pending.last && io.mem.rsp.valid && io.mem.rsp.error + def isLast = if(pending != null) pending.last else True + if(catchAccessError) io.cpu.writeBack.accessError := !request.wr && isLast && io.mem.rsp.valid && io.mem.rsp.error } otherwise { io.cpu.writeBack.data := dataMux if(catchAccessError) io.cpu.writeBack.accessError := (waysHits & B(tagsReadRsp.map(_.error))) =/= 0