diff --git a/src/main/scala/vexriscv/plugin/DBusSimplePlugin.scala b/src/main/scala/vexriscv/plugin/DBusSimplePlugin.scala
index dbf6609..1dfa41f 100644
--- a/src/main/scala/vexriscv/plugin/DBusSimplePlugin.scala
+++ b/src/main/scala/vexriscv/plugin/DBusSimplePlugin.scala
@@ -103,6 +103,13 @@ case class DBusSimpleBus(bigEndian : Boolean = false) extends Bundle with IMaste
     s
   }
 
+  def cmdHalfPipe() : DBusSimpleBus = {
+    val s = DBusSimpleBus(bigEndian)
+    s.cmd << this.cmd.halfPipe()
+    s.rsp >> this.rsp
+    s
+  }
+
   def genMask(cmd : DBusSimpleCmd) = {
     if(bigEndian)
       cmd.size.mux(
@@ -245,7 +252,7 @@ case class DBusSimpleBus(bigEndian : Boolean = false) extends Bundle with IMaste
     }
     bus
   }
-  
+
   def toBmb() : Bmb = {
     val pipelinedMemoryBusConfig = DBusSimpleBus.getBmbParameter()
     val bus = Bmb(pipelinedMemoryBusConfig)