From f113946e6675d9c9534d70200c302cbb09334ee1 Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Wed, 27 Mar 2019 10:53:41 +0100 Subject: [PATCH] Added a neutral LINUX_SOC for sim purposes --- src/main/scala/vexriscv/demo/Linux.scala | 16 +++++++ src/test/cpp/regression/main.cpp | 61 ++++++++++++++++++++++-- src/test/cpp/regression/makefile | 8 ++++ 3 files changed, 80 insertions(+), 5 deletions(-) diff --git a/src/main/scala/vexriscv/demo/Linux.scala b/src/main/scala/vexriscv/demo/Linux.scala index 323940c..f18088d 100644 --- a/src/main/scala/vexriscv/demo/Linux.scala +++ b/src/main/scala/vexriscv/demo/Linux.scala @@ -40,15 +40,31 @@ make run DBUS=SIMPLE IBUS=SIMPLE DHRYSTONE=yes SUPERVISOR=yes CSR=yes COMPRESSED Run linux => sbt "runMain vexriscv.demo.LinuxGen" cd src/test/cpp/regression +make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LINUX_SOC=yes EMULATOR=../../../main/c/emulator/build/emulator.bin VMLINUX=???/vmlinux.bin DTB=???/rv32.dtb RAMDISK=???/initramdisk TRACE=no FLOW_INFO=yes TRACE_START=9570000099 + + + + + + make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LITEX=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/riscv-linux/vmlinux.bin DTB=/home/spinalvm/hdl/riscv-linux/rv32.dtb RAMDISK=/home/spinalvm/hdl/linuxDave/initramdisk_dave TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099 +make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LINUX_SOC=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/linux/linux-1c163f4c7b3f621efff9b28a47abb36f7378d783/vmlinux.bin DTB=/home/spinalvm/hdl/linux/linux-1c163f4c7b3f621efff9b28a47abb36f7378d783/rv32.dtb RAMDISK=/home/spinalvm/hdl/linuxDave/initramdisk_dave TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099 + + + + Other commands (Memo): cp litex_default_configuration .config ARCH=riscv CROSS_COMPILE=riscv64-unknown-elf- make -j`nproc`; riscv64-unknown-elf-objcopy -O binary vmlinux vmlinux.bin riscv64-unknown-elf-objdump -S -d vmlinux > vmlinux.asm; split -b 1M vmlinux.asm + + +ARCH=riscv CROSS_COMPILE=riscv32-unknown-linux-gnu- make -j`nproc`; riscv32-unknown-linux-gnu-objcopy -O binary vmlinux vmlinux.bin + split -b 1M vmlinux.asm dtc -O dtb -o rv32.dtb rv32.dts make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LITEX=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/riscv-linux/vmlinux.bin DTB=/home/spinalvm/hdl/riscv-linux/rv32.dtb RAMDISK=/home/spinalvm/hdl/linuxDave/initramdisk_dave TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099 diff --git a/src/test/cpp/regression/main.cpp b/src/test/cpp/regression/main.cpp index 91af6ee..ab90652 100644 --- a/src/test/cpp/regression/main.cpp +++ b/src/test/cpp/regression/main.cpp @@ -2963,11 +2963,46 @@ public: #endif -#ifdef LITEX -class LitexSoC : public Workspace{ +//#ifdef LITEX +//class LitexSoC : public Workspace{ +//public: +// +// LitexSoC(string name) : Workspace(name) { +// +// } +// virtual bool isDBusCheckedRegion(uint32_t address){ return true;} +// virtual bool isPerifRegion(uint32_t addr) { return (addr & 0xF0000000) == 0xB0000000 || (addr & 0xE0000000) == 0xE0000000;} +// virtual bool isMmuRegion(uint32_t addr) { return (addr & 0xFF000000) != 0x81000000;} +// +// virtual void dBusAccess(uint32_t addr,bool wr, uint32_t size,uint32_t mask, uint32_t *data, bool *error) { +// if(isPerifRegion(addr)) switch(addr){ +// //TODO Emulate peripherals here +// case 0xFFFFFFE0: if(wr) fail(); else *data = mTime; break; +// case 0xFFFFFFE4: if(wr) fail(); else *data = mTime >> 32; break; +// case 0xFFFFFFE8: if(wr) mTimeCmp = (mTimeCmp & 0xFFFFFFFF00000000) | *data; else *data = mTimeCmp; break; +// case 0xFFFFFFEC: if(wr) mTimeCmp = (mTimeCmp & 0x00000000FFFFFFFF) | (((uint64_t)*data) << 32); else *data = mTimeCmp >> 32; break; +// case 0xFFFFFFF8: +// if(wr){ +// cout << (char)*data; +// logTraces << (char)*data; +// logTraces.flush(); +// } else fail(); +// break; +// case 0xFFFFFFFC: fail(); break; //Simulation end +// default: cout << "Unmapped peripheral access : addr=0x" << hex << addr << " wr=" << wr << " mask=0x" << mask << " data=0x" << data << dec << endl; fail(); break; +// } +// +// Workspace::dBusAccess(addr,wr,size,mask,data,error); +// } +//}; +//#endif + + +#ifdef LINUX_SOC +class LinuxSoc : public Workspace{ public: - LitexSoC(string name) : Workspace(name) { + LinuxSoc(string name) : Workspace(name) { } virtual bool isDBusCheckedRegion(uint32_t address){ return true;} @@ -3264,8 +3299,24 @@ int main(int argc, char **argv, char **env) { timespec startedAt = timer_start(); -#ifdef LITEX - LitexSoC("linux") + + +//#ifdef LITEX +// LitexSoC("linux") +// .withRiscvRef() +// ->loadBin(EMULATOR, 0x80000000) +// ->loadBin(DTB, 0x81000000) +// ->loadBin(VMLINUX, 0xc0000000) +// ->loadBin(RAMDISK, 0xc2000000) +// ->setIStall(false) //TODO It currently improve speed but should be removed later +// ->setDStall(false) +// ->bootAt(0x80000000) +// ->run(0); +//#endif + + +#ifdef LINUX_SOC + LinuxSoc("linux") .withRiscvRef() ->loadBin(EMULATOR, 0x80000000) ->loadBin(DTB, 0x81000000) diff --git a/src/test/cpp/regression/makefile b/src/test/cpp/regression/makefile index f5c8d95..6298179 100644 --- a/src/test/cpp/regression/makefile +++ b/src/test/cpp/regression/makefile @@ -57,6 +57,14 @@ ifeq ($(LITEX),yes) ADDCFLAGS += -CFLAGS -DEMULATOR='\"$(EMULATOR)\"' endif +ifeq ($(LINUX_SOC),yes) + ADDCFLAGS += -CFLAGS -DLINUX_SOC + ADDCFLAGS += -CFLAGS -DVMLINUX='\"$(VMLINUX)\"' + ADDCFLAGS += -CFLAGS -DDTB='\"$(DTB)\"' + ADDCFLAGS += -CFLAGS -DRAMDISK='\"$(RAMDISK)\"' + ADDCFLAGS += -CFLAGS -DEMULATOR='\"$(EMULATOR)\"' +endif + ifeq ($(FLOW_INFO),yes) ADDCFLAGS += -CFLAGS -DFLOW_INFO endif