From f44b3451321cd06b037f502034ce294f65c31d80 Mon Sep 17 00:00:00 2001 From: Charles Papon Date: Mon, 31 Jul 2017 21:04:41 +0200 Subject: [PATCH] Add console TX in the Murax verilator --- src/test/cpp/common/uart.h | 95 +++++++++++++++++++-------------- src/test/cpp/murax/main.cpp | 2 + src/test/cpp/murax/makefile | 2 +- src/test/cpp/murax/murax.gtkw | 99 +++++++++++------------------------ 4 files changed, 89 insertions(+), 109 deletions(-) diff --git a/src/test/cpp/common/uart.h b/src/test/cpp/common/uart.h index bee7561..05021ca 100644 --- a/src/test/cpp/common/uart.h +++ b/src/test/cpp/common/uart.h @@ -12,7 +12,7 @@ public: schedule(uartTimeRate); } - enum State {START, DATA, STOP,START_SUCCESS}; + enum State {START, DATA, STOP}; State state = START; char data; uint32_t counter; @@ -51,61 +51,76 @@ public: } }; +#include +#include +#include -/* -class UartRx : public SensitiveProcess{ +class UartTx : public TimeProcess{ public: - CData *rx; + CData *tx; uint32_t uartTimeRate; - UartRx(CData *rx, uint32_t uartTimeRate){ - this->rx = rx; - this->uartTimeRate = uartTimeRate; - } - enum State {START, DATA, STOP,START_SUCCESS}; + enum State {START, DATA, STOP}; State state = START; - uint64_t holdTime = 0; - CData holdValue; char data; uint32_t counter; - virtual void tick(uint64_t time){ - if(time < holdTime){ - if(*rx != holdValue && time + (uartTimeRate>>7) < holdTime){ - cout << "UART RX FRAME ERROR at " << time << endl; - holdTime = time; - state = START; - } - }else{ - switch(state){ + pthread_t inputThreadId; + queue inputsQueue; + mutex inputsMutex; + + UartTx(CData *tx, uint32_t uartTimeRate){ + this->tx = tx; + this->uartTimeRate = uartTimeRate; + schedule(uartTimeRate); + pthread_create(&inputThreadId, NULL, &inputThreadWrapper, this); + *tx = 1; + } + + static void* inputThreadWrapper(void *uartTx){ + ((UartTx*)uartTx)->inputThread(); + return NULL; + } + + void inputThread(){ + while(1){ + uint8_t c = getchar(); + inputsMutex.lock(); + inputsQueue.push(c); + inputsMutex.unlock(); + } + } + + virtual void tick(){ + switch(state){ case START: - case START_SUCCESS: - if(state == START_SUCCESS){ - cout << data << flush; - state = START; - } - if(*rx == 0 && time > uartTimeRate){ - holdTime = time + uartTimeRate; - holdValue = *rx; + inputsMutex.lock(); + if(!inputsQueue.empty()){ + data = inputsQueue.front(); + inputsQueue.pop(); + inputsMutex.unlock(); state = DATA; counter = 0; - data = 0; + *tx = 0; + schedule(uartTimeRate); + } else { + inputsMutex.unlock(); + schedule(uartTimeRate*50); } - break; + break; case DATA: - data |= (*rx) << counter++; + *tx = (data >> counter) & 1; + counter++; if(counter == 8){ state = STOP; } - holdValue = *rx; - holdTime = time + uartTimeRate; - break; + schedule(uartTimeRate); + break; case STOP: - holdTime = time + uartTimeRate; - holdValue = 1; - state = START_SUCCESS; - break; - } + *tx = 1; + schedule(uartTimeRate); + state = START; + break; } } -};*/ \ No newline at end of file +}; diff --git a/src/test/cpp/murax/main.cpp b/src/test/cpp/murax/main.cpp index f0eab5e..9738e84 100644 --- a/src/test/cpp/murax/main.cpp +++ b/src/test/cpp/murax/main.cpp @@ -13,10 +13,12 @@ public: ClockDomain *mainClk = new ClockDomain(&top->io_mainClk,NULL,83333,300000); AsyncReset *asyncReset = new AsyncReset(&top->io_asyncReset,50000); UartRx *uartRx = new UartRx(&top->io_uart_txd,1.0e12/115200); + UartTx *uartTx = new UartTx(&top->io_uart_rxd,1.0e12/115200); timeProcesses.push_back(mainClk); timeProcesses.push_back(asyncReset); timeProcesses.push_back(uartRx); + timeProcesses.push_back(uartTx); Jtag *jtag = new Jtag(&top->io_jtag_tms,&top->io_jtag_tdi,&top->io_jtag_tdo,&top->io_jtag_tck,83333*4); timeProcesses.push_back(jtag); diff --git a/src/test/cpp/murax/makefile b/src/test/cpp/murax/makefile index ce18f87..a319cf5 100644 --- a/src/test/cpp/murax/makefile +++ b/src/test/cpp/murax/makefile @@ -2,7 +2,7 @@ DEBUG?=no TRACE?=no PRINT_PERF?=no TRACE_START=0 -ADDCFLAGS += -CFLAGS -pthread +ADDCFLAGS += -CFLAGS -pthread -LDFLAGS -pthread ifeq ($(TRACE),yes) diff --git a/src/test/cpp/murax/murax.gtkw b/src/test/cpp/murax/murax.gtkw index c73ae3d..5fa869b 100644 --- a/src/test/cpp/murax/murax.gtkw +++ b/src/test/cpp/murax/murax.gtkw @@ -1,88 +1,51 @@ [*] [*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI -[*] Sat Jul 29 10:39:29 2017 +[*] Mon Jul 31 17:03:11 2017 [*] [dumpfile] "/home/spinalvm/Spinal/VexRiscv/src/test/cpp/murax/Murax.vcd" -[dumpfile_mtime] "Sat Jul 29 10:39:12 2017" -[dumpfile_size] 230220943 +[dumpfile_mtime] "Mon Jul 31 17:03:01 2017" +[dumpfile_size] 1539276802 [savefile] "/home/spinalvm/Spinal/VexRiscv/src/test/cpp/murax/murax.gtkw" -[timestart] 56764536000 +[timestart] 300964770000 [size] 1776 953 -[pos] -775 -353 -*-19.000000 56765697000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +[pos] -1 -353 +*-23.000000 300989600000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 [treeopen] TOP. [treeopen] TOP.Murax. -[sst_width] 269 -[signals_width] 488 +[treeopen] TOP.Murax.system_uartCtrl. +[treeopen] TOP.Murax.system_uartCtrl.uartCtrl_1. +[sst_width] 454 +[signals_width] 327 [sst_expanded] 1 -[sst_vpaned_height] 503 -@22 -TOP.io_gpioA_read[31:0] -TOP.io_gpioA_writeEnable[31:0] -TOP.io_gpioA_write[31:0] -[color] 3 -TOP.Murax.system_mainBus_cmd_payload_address[31:0] -[color] 3 -TOP.Murax.system_mainBus_cmd_payload_data[31:0] -[color] 3 -TOP.Murax.system_mainBus_cmd_payload_mask[3:0] +[sst_vpaned_height] 279 @28 -[color] 3 -TOP.Murax.system_mainBus_cmd_valid -[color] 3 -TOP.Murax.system_mainBus_cmd_ready -[color] 3 -TOP.Murax.system_mainBus_cmd_payload_wr +TOP.Murax.system_uartCtrl.io_uart_rxd +TOP.Murax.system_uartCtrl.io_uart_txd +TOP.Murax.system_uartCtrl.io_interrupt +TOP.Murax.system_cpu.CsrPlugin_mstatus_MIE @22 -[color] 3 -TOP.Murax.system_mainBus_rsp_payload_data[31:0] +TOP.Murax.system_uartCtrl.streamFifo_2.io_push_payload[7:0] @28 -[color] 3 -TOP.Murax.system_mainBus_rsp_valid -TOP.Murax.system_ram_bus_cmd_valid -TOP.Murax.system_ram_bus_cmd_ready +TOP.Murax.system_uartCtrl.streamFifo_2.io_push_valid +TOP.Murax.system_uartCtrl.streamFifo_2.io_pop_valid +TOP.Murax.system_uartCtrl.streamFifo_2.io_pop_ready @22 -TOP.Murax.system_ram_bus_cmd_payload_address[31:0] -TOP.Murax.system_ram_bus_cmd_payload_data[31:0] -TOP.Murax.system_ram_bus_cmd_payload_mask[3:0] +TOP.Murax.system_uartCtrl.streamFifo_2.io_pop_payload[7:0] +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.io_read_payload[7:0] @28 -TOP.Murax.system_ram_bus_cmd_payload_wr +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.io_read_valid +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.stateMachine_state[2:0] @22 -TOP.Murax.system_ram_bus_rsp_payload_data[31:0] +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.stateMachine_shifter[7:0] @28 -TOP.Murax.system_ram_bus_rsp_valid -@22 -[color] 1 -TOP.Murax.system_apbBridge_apb_PADDR[19:0] -@28 -TOP.Murax.system_apbBridge_apb_PSEL[0] -TOP.Murax.system_apbBridge_apb_PENABLE -@22 -TOP.Murax.system_apbBridge_apb_PRDATA[31:0] -@28 -TOP.Murax.system_apbBridge_apb_PREADY -@22 -TOP.Murax.system_apbBridge_apb_PWDATA[31:0] -@28 -TOP.Murax.system_apbBridge_apb_PWRITE -TOP.Murax.system_cpu.DebugPlugin_haltIt -TOP.Murax.system_cpu.DebugPlugin_haltIt -TOP.Murax.system_cpu.decode_arbitration_haltIt -TOP.Murax.system_cpu.execute_arbitration_haltItByOther -TOP.Murax.system_cpu.fetch_arbitration_haltIt -TOP.Murax.system_cpu.memory_arbitration_haltIt -TOP.Murax.system_cpu.prefetch_arbitration_haltIt -TOP.Murax.system_cpu.writeBack_arbitration_haltIt -TOP.Murax.system_cpu.prefetch_IBusSimplePlugin_pendingCmd -@22 -TOP.Murax.system_cpu.iBus_cmd_payload_pc[31:0] -@28 -TOP.Murax.system_cpu.iBus_cmd_ready +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.bitTimer_tick +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.bitTimer_counter[2:0] @29 -TOP.Murax.system_cpu.iBus_cmd_valid -@22 -TOP.Murax.system_cpu.iBus_rsp_inst[31:0] +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.io_rxd @28 -TOP.Murax.system_cpu.iBus_rsp_ready +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.sampler_value +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.sampler_tick +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.sampler_samples_1 +TOP.Murax.system_uartCtrl.uartCtrl_1.rx.sampler_samples_2 [pattern_trace] 1 [pattern_trace] 0