diff --git a/xc7/counter_test/README.rst b/xc7/counter_test/README.rst
index 6d1545c..1b075ef 100644
--- a/xc7/counter_test/README.rst
+++ b/xc7/counter_test/README.rst
@@ -43,13 +43,13 @@ At completion, the bitstreams are located in the build directory:
 
 .. code-block:: bash
 
-   cd counter_test/build/<board>
+   counter_test/build/<board>
 
 Now, for **Arty and Basys3**, you can upload the design with:
 
 .. code-block:: bash
 
-   openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
+   TARGET="<board type>" make download -C counter_test
 
 
 The result should be as follows:
diff --git a/xc7/linux_litex_demo/README.rst b/xc7/linux_litex_demo/README.rst
index 4f9359a..ad32ea9 100644
--- a/xc7/linux_litex_demo/README.rst
+++ b/xc7/linux_litex_demo/README.rst
@@ -22,13 +22,13 @@ At completion, the bitstreams are located in the build directory:
 
 .. code-block:: bash
 
-   cd linux_litex_demo/build/<board>
+   linux_litex_demo/build/<board>
 
 Now you can upload the design with:
 
 .. code-block:: bash
 
-   openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
+   TARGET="<board type>" make download -C linux_litex_demo
 
 .. note::
 
diff --git a/xc7/picosoc_demo/README.rst b/xc7/picosoc_demo/README.rst
index 7ae7cd1..7f5be83 100644
--- a/xc7/picosoc_demo/README.rst
+++ b/xc7/picosoc_demo/README.rst
@@ -36,7 +36,7 @@ Now you can upload the design with:
 
 .. code-block:: bash
 
-   openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
+   TARGET="<board type>" make download -C picosoc_demo
 
 
 You should observe the following line in the OpenOCD output:
diff --git a/xc7/pulse_width_led/README.rst b/xc7/pulse_width_led/README.rst
index ee39c2c..880b067 100644
--- a/xc7/pulse_width_led/README.rst
+++ b/xc7/pulse_width_led/README.rst
@@ -22,7 +22,7 @@ Now, you can upload the design with:
 
 .. code-block:: bash
 
-   openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
+   TARGET="arty_35" make download -C pulse_width_led
 
 After downloading the bitstream, you can experiment with and mix different amounts of red, green, and 
 blue on RGB led 0 by toggling different switches and buttons on and off. From left to right: 
diff --git a/xc7/timer/README.rst b/xc7/timer/README.rst
index 3e81195..ee7adb0 100644
--- a/xc7/timer/README.rst
+++ b/xc7/timer/README.rst
@@ -21,7 +21,7 @@ Now, you can upload the design with:
 
 .. code-block:: bash
 
-   openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
+   TARGET="basys3" make download -C timer
 
 After downloading the bitstream you can start and stop the watch by toggling switch 0 on the board.
 Press the center button to reset the counter. The following gives a visual example: