diff --git a/counter_test/Makefile b/counter_test/Makefile
index ed6bbaa..12ce7df 100644
--- a/counter_test/Makefile
+++ b/counter_test/Makefile
@@ -5,7 +5,8 @@ VERILOG:=${current_dir}/counter_basys3.v
 PARTNAME:= xc7a35tcpg236-1
 DEVICE  := xc7a50t_test
 BITSTREAM_DEVICE := artix7
-PCF=${current_dir}/basys3.pcf
+PCF:=${current_dir}/basys3.pcf
+SDC:=${current_dir}/basys3.sdc
 BUILDDIR:=build
 
 all: ${BUILDDIR}/${TOP}.bit
@@ -17,13 +18,13 @@ ${BUILDDIR}/${TOP}.eblif: | ${BUILDDIR}
 	cd ${BUILDDIR} && synth -t ${TOP} -v ${VERILOG} -d ${BITSTREAM_DEVICE} -p ${PARTNAME}
 
 ${BUILDDIR}/${TOP}.net: ${BUILDDIR}/${TOP}.eblif
-	cd ${BUILDDIR} && pack -e ${TOP}.eblif -d ${DEVICE}
+	cd ${BUILDDIR} && pack -e ${TOP}.eblif -d ${DEVICE} -s ${SDC}
 
 ${BUILDDIR}/${TOP}.place: ${BUILDDIR}/${TOP}.net
-	cd ${BUILDDIR} && place -e ${TOP}.eblif -d ${DEVICE} -p ${PCF} -n ${TOP}.net -P ${PARTNAME} 2>&1 > /dev/null
+	cd ${BUILDDIR} && place -e ${TOP}.eblif -d ${DEVICE} -p ${PCF} -n ${TOP}.net -P ${PARTNAME} -s ${SDC} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.route: ${BUILDDIR}/${TOP}.place
-	cd ${BUILDDIR} && route -e ${TOP}.eblif -d ${DEVICE} 2>&1 > /dev/null
+	cd ${BUILDDIR} && route -e ${TOP}.eblif -d ${DEVICE} -s ${SDC} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.fasm: ${BUILDDIR}/${TOP}.route
 	cd ${BUILDDIR} && write_fasm -e ${TOP}.eblif -d ${DEVICE}
diff --git a/counter_test/basys3.sdc b/counter_test/basys3.sdc
new file mode 100644
index 0000000..690c6e3
--- /dev/null
+++ b/counter_test/basys3.sdc
@@ -0,0 +1 @@
+create_clock -period 10 bufg
diff --git a/linux_litex_demo/Makefile b/linux_litex_demo/Makefile
index 83dcfc6..c3905d3 100644
--- a/linux_litex_demo/Makefile
+++ b/linux_litex_demo/Makefile
@@ -10,6 +10,7 @@ PARTNAME := xc7a35tcsg324-1
 DEVICE  := xc7a50t_test
 BITSTREAM_DEVICE := artix7
 PCF := ${current_dir}/arty.pcf
+SDC := ${current_dir}/arty.sdc
 BUILDDIR := build
 
 all: ${BUILDDIR}/${TOP}.bit
@@ -22,13 +23,13 @@ ${BUILDDIR}/${TOP}.eblif: | ${BUILDDIR}
 	cd ${BUILDDIR} && synth -t ${TOP} -v ${VERILOG} -d ${BITSTREAM_DEVICE} -p ${PARTNAME} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.net: ${BUILDDIR}/${TOP}.eblif
-	cd ${BUILDDIR} && pack -e ${TOP}.eblif -d ${DEVICE} 2>&1 > /dev/null
+	cd ${BUILDDIR} && pack -e ${TOP}.eblif -d ${DEVICE} -s ${SDC} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.place: ${BUILDDIR}/${TOP}.net
-	cd ${BUILDDIR} && place -e ${TOP}.eblif -d ${DEVICE} -p ${PCF} -n ${TOP}.net -P ${PARTNAME} 2>&1 > /dev/null
+	cd ${BUILDDIR} && place -e ${TOP}.eblif -d ${DEVICE} -p ${PCF} -n ${TOP}.net -P ${PARTNAME} -s ${SDC} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.route: ${BUILDDIR}/${TOP}.place
-	cd ${BUILDDIR} && route -e ${TOP}.eblif -d ${DEVICE} 2>&1 > /dev/null
+	cd ${BUILDDIR} && route -e ${TOP}.eblif -d ${DEVICE} -s ${SDC} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.fasm: ${BUILDDIR}/${TOP}.route
 	cd ${BUILDDIR} && write_fasm -e ${TOP}.eblif -d ${DEVICE}
diff --git a/linux_litex_demo/arty.sdc b/linux_litex_demo/arty.sdc
new file mode 100644
index 0000000..8085d1a
--- /dev/null
+++ b/linux_litex_demo/arty.sdc
@@ -0,0 +1,40 @@
+# Input clock 100 MHz
+create_clock -period 10 clk100_ibuf -waveform {0.000 5.000}
+
+# Input clock BUFG 100 MHz
+create_clock -period 10 soc_clk100bg -waveform {0.000 5.000}
+
+# PLL feedback loop 100 MHz
+create_clock -period 10 soc_pll_fb -waveform {0.000 5.000}
+
+# PLL CLKOUT0 60 MHz
+create_clock -period 16.666 soc_pll_sys -waveform {0.000 8.333}
+
+# BUFG CLKOUT0 60 MHz
+create_clock -period 16.666 sys_clk -waveform {0.000 8.333}
+
+# PLL CLKOUT1 240 MHz
+create_clock -period 4.166 soc_pll_sys4x  -waveform {0.000 2.083}
+
+# BUFG CLKOUT1 240 MHz
+create_clock -period 4.166 sys4x_clk -waveform {0.000 2.083}
+
+# PLL CLKOUT2 240 MHz
+create_clock -period 4.166 soc_pll_sys4x_dqs -waveform {1.041 3.124}
+
+# BUFG CLKOUT2 240 MHz
+create_clock -period 4.166 sys4x_dqs_clk -waveform {1.041 3.124}
+
+# PLL CLKOUT3 200 MHz
+create_clock -period 5 soc_pll_clk200 -waveform {0.000 2.500}
+
+# BUFG CLKOUT3 200 MHz
+create_clock -period 5 clk200_clk -waveform {0.000 2.500}
+
+# PLL CLKOUT4 25 MHz
+create_clock -period 40 soc_pll_clk100 -waveform {0.000 20.000}
+
+# BUFG CLKOUT4 25 MHz
+create_clock -period 40 eth_ref_clk_obuf -waveform {0.000 20.000}
+
+set_clock_groups -exclusive -group {clk100 soc_clk100bg soc_pll_fb} -group {soc_pll_sys sys_clk} -group {soc_pll_sys4x soc_pll_sys4x_dqs} -group {soc_pll_clk200 clk200_clk}
diff --git a/picosoc_demo/Makefile b/picosoc_demo/Makefile
index bd5e7e2..2cee35b 100644
--- a/picosoc_demo/Makefile
+++ b/picosoc_demo/Makefile
@@ -10,6 +10,7 @@ PARTNAME := xc7a35tcpg236-1
 DEVICE  := xc7a50t_test
 BITSTREAM_DEVICE := artix7
 PCF := ${current_dir}/basys3.pcf
+SDC := ${current_dir}/basys3.sdc
 BUILDDIR := build
 
 all: ${BUILDDIR}/${TOP}.bit
@@ -21,13 +22,13 @@ ${BUILDDIR}/${TOP}.eblif: | ${BUILDDIR}
 	cd ${BUILDDIR} && synth -t ${TOP} -v ${VERILOG} -d ${BITSTREAM_DEVICE} -p ${PARTNAME} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.net: ${BUILDDIR}/${TOP}.eblif
-	cd ${BUILDDIR} && pack -e ${TOP}.eblif -d ${DEVICE} 2>&1 > /dev/null
+	cd ${BUILDDIR} && pack -e ${TOP}.eblif -d ${DEVICE} -s ${SDC} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.place: ${BUILDDIR}/${TOP}.net
-	cd ${BUILDDIR} && place -e ${TOP}.eblif -d ${DEVICE} -p ${PCF} -n ${TOP}.net -P ${PARTNAME} 2>&1 > /dev/null
+	cd ${BUILDDIR} && place -e ${TOP}.eblif -d ${DEVICE} -p ${PCF} -n ${TOP}.net -P ${PARTNAME} -s ${SDC} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.route: ${BUILDDIR}/${TOP}.place
-	cd ${BUILDDIR} && route -e ${TOP}.eblif -d ${DEVICE} 2>&1 > /dev/null
+	cd ${BUILDDIR} && route -e ${TOP}.eblif -d ${DEVICE} -s ${SDC} 2>&1 > /dev/null
 
 ${BUILDDIR}/${TOP}.fasm: ${BUILDDIR}/${TOP}.route
 	cd ${BUILDDIR} && write_fasm -e ${TOP}.eblif -d ${DEVICE}
diff --git a/picosoc_demo/basys3.sdc b/picosoc_demo/basys3.sdc
new file mode 100644
index 0000000..11ebd35
--- /dev/null
+++ b/picosoc_demo/basys3.sdc
@@ -0,0 +1 @@
+create_clock -period 10 clk_bufg