diff --git a/xc7/additional_examples/button_controller/README.rst b/xc7/additional_examples/button_controller/README.rst
index e554065..f174f77 100644
--- a/xc7/additional_examples/button_controller/README.rst
+++ b/xc7/additional_examples/button_controller/README.rst
@@ -1,9 +1,11 @@
-Button Debouncer
+Button Controller
 ~~~~~~~~~~~~~~~~~~
 
-This example demonstrates using a button debouncer state machine to count the number of presses on the center button
-on the basys3 board. The number of presses counted by the debouncer will be given on the two left most digits of the display followed by the count for the number of presses by the non debounced counter. You can reset the button counter
-by pressing the up button on the board. To build the design first navigate to the additional examples directory:
+This example demonstrates using a button debouncer state machine to count the number of presses on the
+center button of the basys3 board. The number of presses counted by the debouncer state machine will
+be given on the two right most digits of the display. The two left most digits record the number of 
+presses counted without the debouncer. You can reset the button counter by pressing the up button on 
+the board. To build the design first navigate to the additional examples directory:
 
 .. code-block:: bash
    :name: additional-examples
@@ -15,14 +17,14 @@ Then run make to compile the design:
 .. code-block:: bash
    :name: example-debouncer-basys3
 
-   make -C button_debouncer
+   make -C button_controller
 
 
 At completion, the bitstream is located in the build directory:
 
 .. code-block:: bash
 
-   cd button_debouncer/build/arty_35
+   cd button_controller/build/arty_35
 
 Now, you can upload the design with:
 
diff --git a/xc7/pulse_width_led/README.rst b/xc7/pulse_width_led/README.rst
index a3a2d0a..2eb6af8 100644
--- a/xc7/pulse_width_led/README.rst
+++ b/xc7/pulse_width_led/README.rst
@@ -1,8 +1,8 @@
-Stop Watch
-~~~~~~~~~~~~
+Pulse Width Modulation
+~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-This example is built specificity for the arty_35T and demonstrates a greater variety of I/O and 
-demonstrates a PWM that drives the RGB leds on the board. To build this example run the following
+This example is built specificity for the arty_35T. It demonstrates a greater variety of I/O and 
+a PWM that drives the RGB leds on the board. To build this example run the following
 commands:
 
 .. code-block:: bash
@@ -15,7 +15,7 @@ At completion, the bitstreams are located in the build directory:
 
 .. code-block:: bash
 
-   cd stop_watch/build/arty_35
+   cd pulse_width_led/build/arty_35
 
 Now, you can upload the design with:
 
@@ -23,10 +23,10 @@ Now, you can upload the design with:
 
    openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
 
-After downloading the bitstream, you can control the color of RGB led 0 by toggling different 
-switches and buttons on and off. From left to right: switches 3,2,1 control the amount of blue, 
-switch 0 and buttons 3 and 2 control the amount of red, and buttons 1 and 0 control the amount of 
-green. The following provides an example:
+After downloading the bitstream, you can experiment with and mix different amounts of red, green, and 
+blue on RGB led 0 by toggling different switches and buttons on and off. From left to right: 
+switches 3, 2, 1 control the intensity of blue, switch 0 and buttons 3 and 2 control the intensity of 
+red, and buttons 1 and 0 control the intensity of green. The following provides an example:
 
 .. image:: ../../docs/images/pwm.gif
    :align: center
diff --git a/xc7/timer/README.rst b/xc7/timer/README.rst
index 9e59e1c..c46a483 100644
--- a/xc7/timer/README.rst
+++ b/xc7/timer/README.rst
@@ -1,21 +1,21 @@
-Stop Watch
-~~~~~~~~~~~~
+Timer
+~~~~~~
 
 This example is built specifically for the basys3 and demonstrates a greater variety of I/O 
-then previous designs. It also demonstrates symbiflow's support for Code written in System Verilog 
+then previous designs. It also demonstrates symbiflow's support for code written in System Verilog 
 as well as its support of dictionaries in XDCs. To build this example run the following commands:
 
 .. code-block:: bash
    :name: example-watch-basys3
 
-   make -C stop_watch
+   make -C timer
 
 
 At completion, the bitstream is located in the build directory:
 
 .. code-block:: bash
 
-   cd stop_watch/build/basys3
+   cd timer/build/basys3
 
 Now, you can upload the design with:
 
@@ -24,7 +24,7 @@ Now, you can upload the design with:
    openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
 
 After downloading the bitstream you can start and stop the watch by toggling switch 0 on the board.
-Press the center button to reset the counter. The following gives an example:
+Press the center button to reset the counter. The following gives a visual example:
 
 .. image:: ../../docs/images/stop-watch.gif
    :align: center