f4pga-examples/xc7/litex_sata_demo/Makefile

9 lines
233 B
Makefile

current_dir := ${CURDIR}
TOP := top
SOURCES := ${current_dir}/litesata.v \
${current_dir}/../../third_party/vexriscv-verilog/VexRiscv.v
XDC := ${current_dir}/nexys_video.xdc
include ${current_dir}/../../common/common.mk