90 lines
2.3 KiB
Verilog
90 lines
2.3 KiB
Verilog
/*
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* PicoSoC - A simple example SoC using PicoRV32
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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module top (
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input clk,
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output tx,
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input rx,
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input [15:0] sw,
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output [15:0] led
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);
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wire clk_bufg;
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BUFG bufg (
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.I(clk),
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.O(clk_bufg)
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);
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reg [5:0] reset_cnt = 0;
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wire resetn = &reset_cnt;
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always @(posedge clk_bufg) begin
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reset_cnt <= reset_cnt + !resetn;
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end
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wire iomem_valid;
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reg iomem_ready;
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wire [ 3:0] iomem_wstrb;
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wire [31:0] iomem_addr;
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wire [31:0] iomem_wdata;
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reg [31:0] iomem_rdata;
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reg [31:0] gpio;
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assign led = gpio[15:0];
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always @(posedge clk_bufg) begin
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if (!resetn) begin
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gpio <= 0;
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end else begin
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iomem_ready <= 0;
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if (iomem_valid && !iomem_ready && iomem_addr[31:24] == 8'h03) begin
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iomem_ready <= 1;
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iomem_rdata <= {sw, gpio[15:0]};
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if (iomem_wstrb[0]) gpio[7:0] <= iomem_wdata[7:0];
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if (iomem_wstrb[1]) gpio[15:8] <= iomem_wdata[15:8];
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if (iomem_wstrb[2]) gpio[23:16] <= iomem_wdata[23:16];
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if (iomem_wstrb[3]) gpio[31:24] <= iomem_wdata[31:24];
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end
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end
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end
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picosoc_noflash soc (
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.clk (clk_bufg),
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.resetn(resetn),
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.ser_tx(tx),
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.ser_rx(rx),
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.irq_5(1'b0),
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.irq_6(1'b0),
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.irq_7(1'b0),
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.iomem_valid(iomem_valid),
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.iomem_ready(iomem_ready),
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.iomem_wstrb(iomem_wstrb),
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.iomem_addr (iomem_addr),
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.iomem_wdata(iomem_wdata),
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.iomem_rdata(iomem_rdata)
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);
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endmodule
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