46 lines
2.9 KiB
Markdown
46 lines
2.9 KiB
Markdown
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<a title="Website" href="https://f4pga.org"><img src="https://img.shields.io/website?longCache=true&style=flat-square&label=f4pga.org&up_color=10cfc9&url=https%3A%2F%2Ff4pga.org%2Findex.html&labelColor=fff"></a><!--
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# F4PGA examples
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<p align="center">
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<a title="GitHub Actions" href="https://github.com/chipsalliance/f4pga-examples/actions"><img src="https://img.shields.io/github/workflow/status/chipsalliance/f4pga-examples/Automerge/main?longCache=true&style=flat-square&label=Tests&logo=Github%20Actions&logoColor=fff"></a><!--
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</p>
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This repository provides example FPGA designs that can be built using the F4PGA open source toolchain.
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These examples target the Xilinx 7-Series and the QuickLogic EOS S3 devices.
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* Please refer to the [](https://f4pga-examples.readthedocs.io)
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for a proper guide on how to run these examples, as well as instructions on how to build and compile your own HDL designs using
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the F4PGA toolchain.
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* See [](https://f4pga.readthedocs.io/projects/arch-defs/)
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to contribute on the development of architecture support in F4PGA.
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The repository includes:
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* [xc7/](./xc7) and [eos-s3/](./eos-s3) - Examples for Xilinx 7-Series and EOS-S3 devices, including:
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* Verilog code
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* Pin constraints files
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* Timing constraints files
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* Makefiles for running the F4PGA toolchain
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* [docs/](./docs) - Guide on how to get started with F4PGA and build provided examples
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* [.github/](./.github) - Directory with CI configuration and scripts
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The examples provided in this repository are automatically built and tested in CI by extracting necessary code snippets
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with [tuttest](https://github.com/antmicro/tuttest).
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