docs/getting-started: section 'Loading bitstreams' moved from arch-defs

Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
This commit is contained in:
Unai Martinez-Corral 2022-08-07 18:02:54 +02:00
parent 1d98f9281b
commit 04f6fed27c
2 changed files with 51 additions and 1 deletions

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@ -172,8 +172,10 @@ man_pages = [
intersphinx_mapping = { intersphinx_mapping = {
"python": ("https://docs.python.org/3/", None), "python": ("https://docs.python.org/3/", None),
"arch-defs": ("https://f4pga.readthedocs.io/projects/arch-defs/en/latest/", None), "arch-defs": ("https://f4pga.readthedocs.io/projects/arch-defs/en/latest/", None),
"interchange": ("https://fpga-interchange-schema.readthedocs.io/", None), "constraints": ("https://hdl.github.io/constraints/", None),
"fasm": ("https://fasm.readthedocs.io/en/latest/", None), "fasm": ("https://fasm.readthedocs.io/en/latest/", None),
"interchange": ("https://fpga-interchange-schema.readthedocs.io/", None),
"openfpgaloader": ("https://trabucayre.github.io/openFPGALoader/", None),
"prjtrellis": ("https://prjtrellis.readthedocs.io/en/latest/", None), "prjtrellis": ("https://prjtrellis.readthedocs.io/en/latest/", None),
"prjxray": ("https://f4pga.readthedocs.io/projects/prjxray/en/latest/", None), "prjxray": ("https://f4pga.readthedocs.io/projects/prjxray/en/latest/", None),
"vtr": ("https://docs.verilogtorouting.org/en/latest/", None), "vtr": ("https://docs.verilogtorouting.org/en/latest/", None),

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@ -18,3 +18,51 @@ your FPGA.
* `Project Trellis ➚ <https://prjtrellis.readthedocs.io/en/latest/>`__ * `Project Trellis ➚ <https://prjtrellis.readthedocs.io/en/latest/>`__
* :gh:`Project Icestorm ➚ <f4pga/icestorm>` * :gh:`Project Icestorm ➚ <f4pga/icestorm>`
.. _GettingStarted:LoadingBitstreams:
Loading bitstreams
==================
For every board, the loading process may vary and different tools may be required.
Typically, each tool supports a specific target family or the lines of products of a vendor.
Some of the most known are listed in :ref:`hdl/constraints: Programming and debugging <constraints:ProgDebug>`.
The tools used in the F4PGA Toolchain are e.g. ``OpenOCD``, ``tinyfpgab`` or ``tinyprog``.
Moreover, :gh:`OpenFPGALoader <trabucayre/openFPGALoader>` is a universal utility for programming FPGA devices, which is
becoming an alternative to the fragmentation in bitstream loading tools.
OpenFPGALoader supports many different boards with FPGAs based on the architectures including xc7, ECP5, iCE40 and many
more.
It can utilize a variety of the programming adapters based on JTAG, DAP interface, ORBTrace, DFU and FTDI chips.
Installing OpenFPGALoader
-------------------------
OpenFPGALoader is available in several packaging solutions.
It can be installed with distribution specific package managers on Arch Linux and Fedora.
There are also prebuilt packages available in `conda <https://anaconda.org/litex-hub/openfpgaloader>`__
or packages in tool :gh:`repository <trabucayre/openFPGALoader/releases>`.
OpenFPGALoader can also be built from sources.
For installation guidelines using both prebuilt packages and building from source, please refer to instructions in
:gh:`readme <trabucayre/openFPGALoader/blob/master/INSTALL.md>`.
Usage
-----
For programming the FPGA, use one of these commands:
.. sourcecode:: bash
openFPGALoader -b <board> <bitstream> # (e.g. arty)
openFPGALoader -c <cable> <bitstream> # (e.g. digilent)
openFPGALoader -d <device> <bitstream> # (e.g. /dev/ttyUSB0)
You can also list the supported boards, cables and FPGAs:
.. sourcecode:: bash
openFPGALoader --list-boards
openFPGALoader --list-cables
openFPGALoader --list-fpga
If you encounter any issues, please refer to :doc:`openfpgaloader:index`.