docs/getting-started: section 'Loading bitstreams' moved from arch-defs
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
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@ -172,8 +172,10 @@ man_pages = [
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intersphinx_mapping = {
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intersphinx_mapping = {
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"python": ("https://docs.python.org/3/", None),
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"python": ("https://docs.python.org/3/", None),
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"arch-defs": ("https://f4pga.readthedocs.io/projects/arch-defs/en/latest/", None),
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"arch-defs": ("https://f4pga.readthedocs.io/projects/arch-defs/en/latest/", None),
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"interchange": ("https://fpga-interchange-schema.readthedocs.io/", None),
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"constraints": ("https://hdl.github.io/constraints/", None),
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"fasm": ("https://fasm.readthedocs.io/en/latest/", None),
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"fasm": ("https://fasm.readthedocs.io/en/latest/", None),
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"interchange": ("https://fpga-interchange-schema.readthedocs.io/", None),
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"openfpgaloader": ("https://trabucayre.github.io/openFPGALoader/", None),
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"prjtrellis": ("https://prjtrellis.readthedocs.io/en/latest/", None),
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"prjtrellis": ("https://prjtrellis.readthedocs.io/en/latest/", None),
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"prjxray": ("https://f4pga.readthedocs.io/projects/prjxray/en/latest/", None),
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"prjxray": ("https://f4pga.readthedocs.io/projects/prjxray/en/latest/", None),
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"vtr": ("https://docs.verilogtorouting.org/en/latest/", None),
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"vtr": ("https://docs.verilogtorouting.org/en/latest/", None),
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@ -18,3 +18,51 @@ your FPGA.
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* `Project Trellis ➚ <https://prjtrellis.readthedocs.io/en/latest/>`__
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* `Project Trellis ➚ <https://prjtrellis.readthedocs.io/en/latest/>`__
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* :gh:`Project Icestorm ➚ <f4pga/icestorm>`
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* :gh:`Project Icestorm ➚ <f4pga/icestorm>`
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.. _GettingStarted:LoadingBitstreams:
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Loading bitstreams
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==================
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For every board, the loading process may vary and different tools may be required.
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Typically, each tool supports a specific target family or the lines of products of a vendor.
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Some of the most known are listed in :ref:`hdl/constraints: Programming and debugging <constraints:ProgDebug>`.
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The tools used in the F4PGA Toolchain are e.g. ``OpenOCD``, ``tinyfpgab`` or ``tinyprog``.
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Moreover, :gh:`OpenFPGALoader <trabucayre/openFPGALoader>` is a universal utility for programming FPGA devices, which is
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becoming an alternative to the fragmentation in bitstream loading tools.
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OpenFPGALoader supports many different boards with FPGAs based on the architectures including xc7, ECP5, iCE40 and many
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more.
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It can utilize a variety of the programming adapters based on JTAG, DAP interface, ORBTrace, DFU and FTDI chips.
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Installing OpenFPGALoader
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-------------------------
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OpenFPGALoader is available in several packaging solutions.
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It can be installed with distribution specific package managers on Arch Linux and Fedora.
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There are also prebuilt packages available in `conda <https://anaconda.org/litex-hub/openfpgaloader>`__
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or packages in tool :gh:`repository <trabucayre/openFPGALoader/releases>`.
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OpenFPGALoader can also be built from sources.
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For installation guidelines using both prebuilt packages and building from source, please refer to instructions in
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:gh:`readme <trabucayre/openFPGALoader/blob/master/INSTALL.md>`.
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Usage
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-----
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For programming the FPGA, use one of these commands:
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.. sourcecode:: bash
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openFPGALoader -b <board> <bitstream> # (e.g. arty)
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openFPGALoader -c <cable> <bitstream> # (e.g. digilent)
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openFPGALoader -d <device> <bitstream> # (e.g. /dev/ttyUSB0)
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You can also list the supported boards, cables and FPGAs:
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.. sourcecode:: bash
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openFPGALoader --list-boards
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openFPGALoader --list-cables
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openFPGALoader --list-fpga
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If you encounter any issues, please refer to :doc:`openfpgaloader:index`.
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