diff --git a/.github/workflows/Pipeline.yml b/.github/workflows/Pipeline.yml
index b68df86..522058f 100644
--- a/.github/workflows/Pipeline.yml
+++ b/.github/workflows/Pipeline.yml
@@ -110,8 +110,8 @@ jobs:
         run: |
           . ./.github/scripts/activate.sh
 
-          echo "F4PGA_ENV_BIN=$(f4pga-env bin)" >> "$GITHUB_ENV"
-          echo "F4PGA_ENV_SHARE=$(f4pga-env share)" >> "$GITHUB_ENV"
+          echo "F4PGA_BIN_DIR=$(f4pga-env bin)" >> "$GITHUB_ENV"
+          echo "F4PGA_SHARE_DIR=$(f4pga-env share)" >> "$GITHUB_ENV"
 
       - name: 🚧 Test make example
         run: |
diff --git a/f4pga/__init__.py b/f4pga/__init__.py
index 5cb88bf..194742d 100755
--- a/f4pga/__init__.py
+++ b/f4pga/__init__.py
@@ -70,10 +70,18 @@ from f4pga.argparser import setup_argparser, get_cli_flow_config
 
 F4CACHEPATH = '.f4cache'
 
-binpath = str(Path(sys_argv[0]).resolve().parent.parent)
+install_dir = environ.get("F4PGA_INSTALL_DIR", "/usr/local")
+
 mypath = str(Path(__file__).resolve().parent)
 
-share_dir_path = str(Path(f"{environ.get('F4PGA_INSTALL_DIR', '/usr/local')}/xc7/install/share/symbiflow").resolve())
+
+bin_dir_path = \
+    environ.get('F4PGA_BIN_DIR', str(Path(sys_argv[0]).resolve().parent.parent))
+share_dir_path = \
+    environ.get('F4PGA_SHARE_DIR',
+                str(Path(f'{install_dir}/xc7/install/share/symbiflow').resolve()))
+if share_dir_path is None:
+    share_dir_path = str(Path(f'{install_dir}/xc7/install/share/symbiflow').resolve()) 
 
 class DependencyNotProducedException(F4PGAException):
     dep_name: str
@@ -214,7 +222,7 @@ def config_mod_runctx(stage: Stage, values: 'dict[str, ]',
                       config_paths: 'dict[str, str | list[str]]'):
     config = prepare_stage_input(stage, values,
                                  dep_paths, config_paths)
-    return ModRunCtx(share_dir_path, binpath, config)
+    return ModRunCtx(share_dir_path, bin_dir_path, config)
 
 def _process_dep_path(path: str, f4cache: F4Cache):
     f4cache.process_file(Path(path))
@@ -510,7 +518,7 @@ def setup_resolution_env():
 
     r_env = ResolutionEnv({
         'shareDir': share_dir_path,
-        'binDir': str((Path(share_dir_path) / '../../bin').resolve())
+        'binDir': bin_dir_path
     })
 
     def _noisy_warnings():
diff --git a/f4pga/wrappers/sh/__init__.py b/f4pga/wrappers/sh/__init__.py
index 63a0663..22b0321 100644
--- a/f4pga/wrappers/sh/__init__.py
+++ b/f4pga/wrappers/sh/__init__.py
@@ -37,8 +37,8 @@ if F4PGA_INSTALL_DIR is None:
     raise(Exception("Required environment variable F4PGA_INSTALL_DIR is undefined!"))
 F4PGA_INSTALL_DIR_PATH = Path(F4PGA_INSTALL_DIR)
 
-f4pga_environ['F4PGA_ENV_BIN'] = f4pga_environ.get('F4PGA_ENV_BIN', str(F4PGA_INSTALL_DIR_PATH / FPGA_FAM / 'conda/bin'))
-f4pga_environ['F4PGA_ENV_SHARE'] = f4pga_environ.get('F4PGA_ENV_SHARE', str(F4PGA_INSTALL_DIR_PATH / FPGA_FAM / (
+f4pga_environ['F4PGA_BIN_DIR'] = f4pga_environ.get('F4PGA_BIN_DIR', str(F4PGA_INSTALL_DIR_PATH / FPGA_FAM / 'conda/bin'))
+f4pga_environ['F4PGA_SHARE_DIR'] = f4pga_environ.get('F4PGA_SHARE_DIR', str(F4PGA_INSTALL_DIR_PATH / FPGA_FAM / (
     'share' if isQuickLogic else 'install/share/symbiflow'
 )))
 
diff --git a/f4pga/wrappers/sh/quicklogic/analysis.f4pga.sh b/f4pga/wrappers/sh/quicklogic/analysis.f4pga.sh
index 136b1ab..15232bb 100755
--- a/f4pga/wrappers/sh/quicklogic/analysis.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/analysis.f4pga.sh
@@ -19,7 +19,7 @@
 set -e
 
 if [ -z $VPRPATH ]; then
-  export VPRPATH="$F4PGA_ENV_BIN"
+  export VPRPATH="$F4PGA_BIN_DIR"
   export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
diff --git a/f4pga/wrappers/sh/quicklogic/fasm2bels.f4pga.sh b/f4pga/wrappers/sh/quicklogic/fasm2bels.f4pga.sh
index 99bb16d..e3116a9 100755
--- a/f4pga/wrappers/sh/quicklogic/fasm2bels.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/fasm2bels.f4pga.sh
@@ -18,8 +18,8 @@
 
 set -e
 
-SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_ENV_SHARE"}
-BIN_DIR_PATH=${BIN_DIR_PATH:="$F4PGA_ENV_BIN"}
+SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
+BIN_DIR_PATH=${BIN_DIR_PATH:="$F4PGA_BIN_DIR"}
 
 OPTS=d:P:p:b:
 LONGOPTS=device:,part:,pcf:,bit:,
diff --git a/f4pga/wrappers/sh/quicklogic/generate_bitstream.f4pga.sh b/f4pga/wrappers/sh/quicklogic/generate_bitstream.f4pga.sh
index 2d1e56a..1027323 100755
--- a/f4pga/wrappers/sh/quicklogic/generate_bitstream.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/generate_bitstream.f4pga.sh
@@ -18,7 +18,7 @@
 
 set -e
 
-SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_ENV_SHARE"}
+SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
 OPTS=d:f:r:b:P:
 LONGOPTS=device:,fasm:,format:,bit:,part:
 
@@ -57,7 +57,7 @@ if [ -z $BIT ]; then
   exit 1
 fi
 
-DB_ROOT="$F4PGA_ENV_SHARE"/fasm_database/${DEVICE}
+DB_ROOT="$F4PGA_SHARE_DIR"/fasm_database/${DEVICE}
 
 # qlf
 if [[ "$DEVICE" =~ ^(qlf_k4n8.*)$ ]]; then
diff --git a/f4pga/wrappers/sh/quicklogic/generate_constraints.f4pga.sh b/f4pga/wrappers/sh/quicklogic/generate_constraints.f4pga.sh
index a0dc823..54b7ace 100755
--- a/f4pga/wrappers/sh/quicklogic/generate_constraints.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/generate_constraints.f4pga.sh
@@ -29,8 +29,8 @@ CORNER=$7
 PROJECT=$(basename -- "$EBLIF")
 IOPLACE_FILE="${PROJECT%.*}_io.place"
 
-BIN_DIR_PATH=${BIN_DIR_PATH:="$F4PGA_ENV_BIN"}
-SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_ENV_SHARE"}
+BIN_DIR_PATH=${BIN_DIR_PATH:="$F4PGA_BIN_DIR"}
+SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
 
 PYTHON3=$(which python3)
 
diff --git a/f4pga/wrappers/sh/quicklogic/generate_libfile.f4pga.sh b/f4pga/wrappers/sh/quicklogic/generate_libfile.f4pga.sh
index 007455c..b07cc68 100755
--- a/f4pga/wrappers/sh/quicklogic/generate_libfile.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/generate_libfile.f4pga.sh
@@ -31,10 +31,10 @@ else
   DEVICE_1=${DEVICE}
 fi
 
-ARCH_DIR="$F4PGA_ENV_SHARE"/arch/${DEVICE_1}_${DEVICE_1}
+ARCH_DIR="$F4PGA_SHARE_DIR"/arch/${DEVICE_1}_${DEVICE_1}
 PINMAP_XML=${ARCH_DIR}/${PINMAPXML}
 
-`which python3` "$F4PGA_ENV_BIN"/python/create_lib.py \
+`which python3` "$F4PGA_BIN_DIR"/python/create_lib.py \
   -n ${DEV}_0P72_SSM40 \
   -m fpga_top \
   -c $PART \
diff --git a/f4pga/wrappers/sh/quicklogic/pack.f4pga.sh b/f4pga/wrappers/sh/quicklogic/pack.f4pga.sh
index eb44c03..030b6e9 100755
--- a/f4pga/wrappers/sh/quicklogic/pack.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/pack.f4pga.sh
@@ -19,7 +19,7 @@
 set -e
 
 if [ -z $VPRPATH ]; then
-  export VPRPATH="$F4PGA_ENV_BIN"
+  export VPRPATH="$F4PGA_BIN_DIR"
   export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
diff --git a/f4pga/wrappers/sh/quicklogic/place.f4pga.sh b/f4pga/wrappers/sh/quicklogic/place.f4pga.sh
index b4508fc..9fdf58f 100755
--- a/f4pga/wrappers/sh/quicklogic/place.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/place.f4pga.sh
@@ -19,7 +19,7 @@
 set -e
 
 if [ -z $VPRPATH ]; then
-  export VPRPATH="$F4PGA_ENV_BIN"
+  export VPRPATH="$F4PGA_BIN_DIR"
   export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
diff --git a/f4pga/wrappers/sh/quicklogic/ql.f4pga.sh b/f4pga/wrappers/sh/quicklogic/ql.f4pga.sh
index 24213ab..bbaa8fa 100755
--- a/f4pga/wrappers/sh/quicklogic/ql.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/ql.f4pga.sh
@@ -18,7 +18,7 @@
 
 set -e
 
-SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_ENV_SHARE"}
+SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
 
 source $(dirname "$0")/vpr_common.f4pga.sh
 
@@ -361,7 +361,7 @@ else
   PCF_MAKE="\${current_dir}/${BUILDDIR}/${TOP}_dummy.pcf"
 fi
 
-PROCESS_SDC=$(realpath "$F4PGA_ENV_BIN"/python/process_sdc_constraints.py)
+PROCESS_SDC=$(realpath "$F4PGA_BIN_DIR"/python/process_sdc_constraints.py)
 if ! [ -z "$SDC" ]; then
   if ! [ -f "$SOURCE"/$SDC ];then
     echo "The sdc file: $SDC is missing at: $SOURCE"
diff --git a/f4pga/wrappers/sh/quicklogic/repack.f4pga.sh b/f4pga/wrappers/sh/quicklogic/repack.f4pga.sh
index e424891..595cd92 100755
--- a/f4pga/wrappers/sh/quicklogic/repack.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/repack.f4pga.sh
@@ -19,7 +19,7 @@
 set -e
 
 if [ -z $VPRPATH ]; then
-  export VPRPATH="$F4PGA_ENV_BIN"
+  export VPRPATH="$F4PGA_BIN_DIR"
 fi
 
 source $(dirname "$0")/vpr_common.f4pga.sh
@@ -30,9 +30,9 @@ DESIGN=${EBLIF/.eblif/}
 [ ! -z "${JSON}" ] && JSON_ARGS="--json-constraints ${JSON}" || JSON_ARGS=
 [ ! -z "${PCF_PATH}" ] && PCF_ARGS="--pcf-constraints ${PCF_PATH}" || PCF_ARGS=
 
-export PYTHONPATH=$F4PGA_ENV_BIN/python:$PYTHONPATH
+export PYTHONPATH=$F4PGA_BIN_DIR/python:$PYTHONPATH
 
-`which python3` "$F4PGA_ENV_BIN"/python/repacker/repack.py \
+`which python3` "$F4PGA_BIN_DIR"/python/repacker/repack.py \
   --vpr-arch ${ARCH_DEF} \
   --repacking-rules ${ARCH_DIR}/${DEVICE_1}.repacking_rules.json \
   $JSON_ARGS \
diff --git a/f4pga/wrappers/sh/quicklogic/route.f4pga.sh b/f4pga/wrappers/sh/quicklogic/route.f4pga.sh
index 5ed8717..e83f122 100755
--- a/f4pga/wrappers/sh/quicklogic/route.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/route.f4pga.sh
@@ -19,7 +19,7 @@
 set -e
 
 if [ -z $VPRPATH ]; then
-  export VPRPATH="$F4PGA_ENV_BIN"
+  export VPRPATH="$F4PGA_BIN_DIR"
   export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
diff --git a/f4pga/wrappers/sh/quicklogic/synth.f4pga.sh b/f4pga/wrappers/sh/quicklogic/synth.f4pga.sh
index 92f11f4..7bf080a 100755
--- a/f4pga/wrappers/sh/quicklogic/synth.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/synth.f4pga.sh
@@ -18,8 +18,8 @@
 
 set -e
 
-export SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_ENV_SHARE"}
-VPRPATH=${VPRPATH:="$F4PGA_ENV_BIN"}
+export SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
+VPRPATH=${VPRPATH:="$F4PGA_BIN_DIR"}
 SPLIT_INOUTS=`realpath ${VPRPATH}/python/split_inouts.py`
 CONVERT_OPTS=`realpath ${VPRPATH}/python/convert_compile_opts.py`
 
diff --git a/f4pga/wrappers/sh/quicklogic/vpr_common.f4pga.sh b/f4pga/wrappers/sh/quicklogic/vpr_common.f4pga.sh
index 60c9523..f9e7985 100755
--- a/f4pga/wrappers/sh/quicklogic/vpr_common.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/vpr_common.f4pga.sh
@@ -16,7 +16,7 @@
 #
 # SPDX-License-Identifier: Apache-2.0
 
-SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_ENV_SHARE"}
+SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
 
 if [ -z $VPR_OPTIONS ]; then
      echo "Using default VPR options."
diff --git a/f4pga/wrappers/sh/quicklogic/write_fasm.f4pga.sh b/f4pga/wrappers/sh/quicklogic/write_fasm.f4pga.sh
index 50c87c5..e0623d2 100755
--- a/f4pga/wrappers/sh/quicklogic/write_fasm.f4pga.sh
+++ b/f4pga/wrappers/sh/quicklogic/write_fasm.f4pga.sh
@@ -19,7 +19,7 @@
 set -e
 
 if [ -z $VPRPATH ]; then
-  export VPRPATH="$F4PGA_ENV_BIN"
+  export VPRPATH="$F4PGA_BIN_DIR"
   export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
diff --git a/f4pga/wrappers/sh/xc7/generate_constraints.f4pga.sh b/f4pga/wrappers/sh/xc7/generate_constraints.f4pga.sh
index 69c9725..2bbd2f8 100755
--- a/f4pga/wrappers/sh/xc7/generate_constraints.f4pga.sh
+++ b/f4pga/wrappers/sh/xc7/generate_constraints.f4pga.sh
@@ -29,7 +29,7 @@ if [ ! -z $PCF ]; then
     PCF_OPTS="--pcf $PCF"
 fi
 
-SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_ENV_SHARE"}
+SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
 
 PROJECT=$(basename -- "$EBLIF")
 IOPLACE_FILE="${PROJECT%.*}.ioplace"
diff --git a/f4pga/wrappers/sh/xc7/synth.f4pga.sh b/f4pga/wrappers/sh/xc7/synth.f4pga.sh
index cb28ef2..9ba3709 100755
--- a/f4pga/wrappers/sh/xc7/synth.f4pga.sh
+++ b/f4pga/wrappers/sh/xc7/synth.f4pga.sh
@@ -18,7 +18,7 @@
 
 set -e
 
-export SHARE_DIR_PATH="$F4PGA_ENV_SHARE"
+export SHARE_DIR_PATH="$F4PGA_SHARE_DIR"
 export TECHMAP_PATH=${SHARE_DIR_PATH}/techmaps/xc7_vpr/techmap
 
 export UTILS_PATH=${SHARE_DIR_PATH}/scripts
diff --git a/f4pga/wrappers/sh/xc7/vpr_common.f4pga.sh b/f4pga/wrappers/sh/xc7/vpr_common.f4pga.sh
index 416caf0..a3801ca 100755
--- a/f4pga/wrappers/sh/xc7/vpr_common.f4pga.sh
+++ b/f4pga/wrappers/sh/xc7/vpr_common.f4pga.sh
@@ -16,7 +16,7 @@
 #
 # SPDX-License-Identifier: Apache-2.0
 
-SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_ENV_SHARE"}
+SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
 
 if [ -z $VPR_OPTIONS ]; then
      echo "Using default VPR options."