diff --git a/docs/conf.py b/docs/conf.py
index 281dd71..d0c1e85 100644
--- a/docs/conf.py
+++ b/docs/conf.py
@@ -80,7 +80,7 @@ rst_prolog = """
 
 html_show_sourcelink = True
 
-html_theme = 'sphinx_symbiflow_theme'
+html_theme = 'sphinx_f4pga_theme'
 
 html_theme_options = {
     'repo_name': 'chipsalliance/f4pga',
diff --git a/docs/requirements.txt b/docs/requirements.txt
index a7505cb..c5cb067 100644
--- a/docs/requirements.txt
+++ b/docs/requirements.txt
@@ -1,5 +1,5 @@
 sphinx>=4.5.0
 sphinxcontrib-bibtex
-https://github.com/SymbiFlow/sphinx_symbiflow_theme/archive/chips.zip#sphinx-symbiflow-theme
+https://github.com/f4pga/sphinx_f4pga_theme/archive/f4pga.zip#sphinx-f4pga-theme
 https://github.com/SymbiFlow/sphinx-verilog-domain/archive/master.zip#sphinx-verilog-domain
 tabulate