f4pga/setup: same installation regardless of FPGA_FAM (#619)
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commit
8eb0441d71
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@ -24,9 +24,6 @@ from subprocess import run
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from setuptools import setup as setuptools_setup
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from setuptools import setup as setuptools_setup
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from os import environ
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FPGA_FAM = environ.get('FPGA_FAM', 'xc7')
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packagePath = Path(__file__).resolve().parent
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packagePath = Path(__file__).resolve().parent
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requirementsFile = packagePath / "requirements.txt"
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requirementsFile = packagePath / "requirements.txt"
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@ -69,6 +66,7 @@ if git is not None:
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if version is None:
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if version is None:
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version = semver
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version = semver
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sf = "symbiflow"
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sf = "symbiflow"
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shwrappers = "f4pga.wrappers.sh.__init__"
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shwrappers = "f4pga.wrappers.sh.__init__"
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@ -108,25 +106,27 @@ setuptools_setup(
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entry_points={
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entry_points={
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"console_scripts": [
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"console_scripts": [
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"f4pga = f4pga.__init__:main",
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"f4pga = f4pga.__init__:main",
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f"{sf}_pack = {shwrappers}:pack",
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# QuickLogic only
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f"{sf}_place = {shwrappers}:place",
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f"ql_{sf} = {shwrappers}:ql",
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f"{sf}_route = {shwrappers}:route",
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] + [
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f"{sf}_synth = {shwrappers}:synth",
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f"{sf}_{script} = {shwrappers}:{script}" for script in [
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f"{sf}_write_fasm = {shwrappers}:write_fasm"
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"pack",
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] + (
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"place",
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[
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"route",
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f"{sf}_write_bitstream = {shwrappers}:write_bitstream",
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"synth",
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] if FPGA_FAM == 'xc7' else [
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"write_fasm",
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f"{sf}_analysis = {shwrappers}:analysis",
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# Xilinx only
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f"{sf}_fasm2bels = {shwrappers}:fasm2bels",
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"write_bitstream",
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f"{sf}_generate_bitstream = {shwrappers}:generate_bitstream",
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# QuickLogic only
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f"{sf}_repack = {shwrappers}:repack",
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"analysis",
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f"{sf}_write_binary = {shwrappers}:write_binary",
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"fasm2bels",
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f"{sf}_write_bitheader = {shwrappers}:write_bitheader",
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"generate_bitstream",
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f"{sf}_write_jlink = {shwrappers}:write_jlink",
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"repack",
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f"{sf}_write_openocd = {shwrappers}:write_openocd",
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"write_binary",
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f"ql_{sf} = {shwrappers}:ql",
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"write_bitheader",
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"write_jlink",
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"write_openocd",
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]
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]
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)
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]
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},
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},
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)
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)
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