Hardware
/
f4pga
mirror of https://github.com/chipsalliance/f4pga.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

docs: add hero image 

Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
This commit is contained in:
Unai Martinez-Corral 2022-03-15 23:30:59 +01:00
parent 894b7369f2
commit 9d2c99de6a
2 changed files with 6 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
docs/_static/images/hero.svg vendored Normal file
View File

File diff suppressed because one or more lines are too long
Side by Side

After

Width:  |  Height:  |  Size: 56 KiB

8
docs/index.rst
View File

@ -1,11 +1,13 @@
FOSS Flows For FPGA
###################
F4PGA is an Open Source HDL-to-Bitstream FPGA synthesis solution, currently targeting Xilinx 7-Series, Lattice iCE40 and
Lattice ECP5 FPGAs.
F4PGA is an Open Source solution for Hardware Description Language (HDL) to Bitstream FPGA synthesis, currently
targeting Xilinx 7-Series, Lattice iCE40 and Lattice ECP5 FPGAs.
Think of it as the GCC of FPGAs.
The project aims to design tools that are highly extendable and multiplatform.
The project aim is to design tools that are highly extendable and multiplatform.
.. image:: _static/images/hero.svg
:align: center
.. toctree::