From 9e327656a104e6516b9b7eed1354c5de4d86c817 Mon Sep 17 00:00:00 2001 From: Unai Martinez-Corral Date: Wed, 7 Sep 2022 02:14:06 +0200 Subject: [PATCH] f4pga/wrappers/sh/synth: update Signed-off-by: Unai Martinez-Corral --- f4pga/wrappers/sh/quicklogic/synth.f4pga.sh | 107 ++++++-------------- f4pga/wrappers/sh/xc7/synth.f4pga.sh | 95 +++++------------ 2 files changed, 55 insertions(+), 147 deletions(-) diff --git a/f4pga/wrappers/sh/quicklogic/synth.f4pga.sh b/f4pga/wrappers/sh/quicklogic/synth.f4pga.sh index d5465f9..7b5c34a 100755 --- a/f4pga/wrappers/sh/quicklogic/synth.f4pga.sh +++ b/f4pga/wrappers/sh/quicklogic/synth.f4pga.sh @@ -44,66 +44,28 @@ EXTRA_ARGS=() OPT="" for arg in $@; do - case $arg in - -t|--top) - OPT="top" - ;; - -v|--verilog) - OPT="vlog" - ;; - -d|--device) - OPT="dev" - ;; - -F|--family) - OPT="family" - ;; - -P|--part) - OPT="part" - ;; - -p|--pcf) - OPT="pcf" - ;; - -y|-f|+incdir+*|+libext+*|+define+*) - OPT="xtra" - ;; - *) - case $OPT in - "top") - TOP=$arg - OPT="" - ;; - "vlog") - VERILOG_FILES+=($arg) - ;; - "dev") - DEVICE=$arg - OPT="" - ;; - "family") - FAMILY=$arg - OPT="" - ;; - "part") - PART=$arg - OPT="" - ;; - "pcf") - PCF=$arg - OPT="" - ;; - "xtra") - ;; - *) - print_usage - ;; - esac - ;; - esac - - if [ "$OPT" == "xtra" ]; then - EXTRA_ARGS+=($arg) - fi - + case $arg in + -t|--top) OPT="top" ;; + -v|--verilog) OPT="vlog" ;; + -d|--device) OPT="dev" ;; + -F|--family) OPT="family" ;; + -P|--part) OPT="part" ;; + -p|--pcf) OPT="pcf" ;; + -y|-f|+incdir+*|+libext+*|+define+*) OPT="xtra" ;; + *) + case $OPT in + "top") TOP=$arg; OPT="" ;; + "dev") DEVICE=$arg; OPT="" ;; + "family") FAMILY=$arg; OPT="" ;; + "part") PART=$arg; OPT="" ;; + "pcf") PCF=$arg; OPT="" ;; + "vlog") VERILOG_FILES+=($arg) ;; + "xtra") ;; + *) print_usage ;; + esac + ;; + esac + if [ "$OPT" == "xtra" ]; then EXTRA_ARGS+=($arg); fi done if [ -z ${FAMILY} ]; then echo "Please specify device family"; exit 1; fi @@ -120,9 +82,9 @@ export OUT_FASM_EXTRA=${TOP}_fasm_extra.fasm export PYTHON3=$(which python3) if [ -s $PCF ]; then - export PCF_FILE=$PCF + export PCF_FILE=$PCF else - export PCF_FILE="" + export PCF_FILE="" fi DEVICE_PATH="${F4PGA_SHARE_DIR}/arch/${DEVICE}_${DEVICE}" @@ -145,19 +107,8 @@ else fi fi -YOSYS_COMMANDS=`echo ${EXTRA_ARGS[*]} | python3 -m f4pga.utils.quicklogic.convert_compile_opts` -YOSYS_COMMANDS="${YOSYS_COMMANDS//$'\n'/'; '}" - -LOG=${TOP}_synth.log - -YOSYS_SCRIPT="tcl $(python3 -m f4pga.wrappers.tcl "${FAMILY}")" - -for f in ${VERILOG_FILES[*]}; do - YOSYS_SCRIPT="read_verilog ${f}; $YOSYS_SCRIPT" -done - -if [ ! -z "${YOSYS_COMMANDS}" ]; then - YOSYS_SCRIPT="$YOSYS_COMMANDS; $YOSYS_SCRIPT" -fi - -`which yosys` -p "${YOSYS_SCRIPT}" -l $LOG +yosys_cmds=`echo ${EXTRA_ARGS[*]} | python3 -m f4pga.utils.quicklogic.convert_compile_opts` +`which yosys` \ + -p "${yosys_cmds//$'\n'/'; '} tcl $(python3 -m f4pga.wrappers.tcl "${FAMILY}")" \ + -l "${TOP}_synth.log" \ + ${VERILOG_FILES[*]} diff --git a/f4pga/wrappers/sh/xc7/synth.f4pga.sh b/f4pga/wrappers/sh/xc7/synth.f4pga.sh index c5d0d9a..6848e69 100755 --- a/f4pga/wrappers/sh/xc7/synth.f4pga.sh +++ b/f4pga/wrappers/sh/xc7/synth.f4pga.sh @@ -35,55 +35,12 @@ SURELOG=0 for arg in $@; do echo $arg case "$arg" in - -t|--top) - echo "adding top" - VERILOGLIST=0 - XDCLIST=0 - TOPNAME=1 - DEVICENAME=0 - PARTNAME=0 - SURELOG=0 - ;; - -x|--xdc) - VERILOGLIST=0 - XDCLIST=1 - TOPNAME=0 - DEVICENAME=0 - PARTNAME=0 - SURELOG=0 - ;; - -v|--verilog) - VERILOGLIST=1 - XDCLIST=0 - TOPNAME=0 - DEVICENAME=0 - PARTNAME=0 - SURELOG=0 - ;; - -d|--device) - VERILOGLIST=0 - XDCLIST=0 - TOPNAME=0 - DEVICENAME=1 - PARTNAME=0 - SURELOG=0 - ;; - -p|--part) - VERILOGLIST=0 - XDCLIST=0 - TOPNAME=0 - DEVICENAME=0 - PARTNAME=1 - SURELOG=0 - ;; - -s|--surelog) - VERILOGLIST=0 - XDCLIST=0 - TOPNAME=0 - DEVICENAME=0 - PARTNAME=0 - SURELOG=1 - ;; + -v|--verilog) VERILOGLIST=1 XDCLIST=0 TOPNAME=0 DEVICENAME=0 PARTNAME=0 SURELOG=0 ;; + -x|--xdc) VERILOGLIST=0 XDCLIST=1 TOPNAME=0 DEVICENAME=0 PARTNAME=0 SURELOG=0 ;; + -t|--top) VERILOGLIST=0 XDCLIST=0 TOPNAME=1 DEVICENAME=0 PARTNAME=0 SURELOG=0 ;; + -d|--device) VERILOGLIST=0 XDCLIST=0 TOPNAME=0 DEVICENAME=1 PARTNAME=0 SURELOG=0 ;; + -p|--part) VERILOGLIST=0 XDCLIST=0 TOPNAME=0 DEVICENAME=0 PARTNAME=1 SURELOG=0 ;; + -s|--surelog) VERILOGLIST=0 XDCLIST=0 TOPNAME=0 DEVICENAME=0 PARTNAME=0 SURELOG=1 ;; *) if [ $VERILOGLIST -eq 1 ]; then VERILOG_FILES+=($arg) @@ -107,27 +64,27 @@ for arg in $@; do esac done -if [ ${#VERILOG_FILES[@]} -eq 0 ]; then - echo "Please provide at least one Verilog file" - exit 1 -fi +if [ ${#VERILOG_FILES[@]} -eq 0 ]; then echo "Please provide at least one Verilog file"; exit 1; fi -DATABASE_DIR=${DATABASE_DIR:-$(prjxray-config)} +export TOP="${TOP}" +export USE_ROI='FALSE' +export INPUT_XDC_FILES="${XDC_FILES[*]}" +export OUT_JSON="$TOP.json" +export OUT_SDC="${TOP}.sdc" +export SYNTH_JSON="${TOP}_io.json" +export OUT_SYNTH_V="${TOP}_synth.v" +export OUT_EBLIF="${TOP}.eblif" +export PART_JSON=`realpath ${DATABASE_DIR:-$(prjxray-config)}/$DEVICE/$PART/part.json` +export OUT_FASM_EXTRA="${TOP}_fasm_extra.fasm" +export PYTHON3="${PYTHON3:-$(which python3)}" -export TOP=${TOP} -export USE_ROI="FALSE" -export INPUT_XDC_FILES=${XDC_FILES[*]} -export OUT_JSON=$TOP.json -export OUT_SDC=${TOP}.sdc -export SYNTH_JSON=${TOP}_io.json -export OUT_SYNTH_V=${TOP}_synth.v -export OUT_EBLIF=${TOP}.eblif -export PART_JSON=`realpath ${DATABASE_DIR}/$DEVICE/$PART/part.json` -export OUT_FASM_EXTRA=${TOP}_fasm_extra.fasm -export PYTHON3=${PYTHON3:-$(which python3)} - -yosys_read_cmds="read_verilog" +yosys_read_cmds="" +yosys_files="${VERILOG_FILES[*]}" if [ -n "$SURELOG_CMD" ]; then - yosys_read_cmds="plugin -i uhdm; read_verilog_with_uhdm ${SURELOG_CMD[*]}" + yosys_read_cmds="plugin -i uhdm; read_verilog_with_uhdm ${SURELOG_CMD[*]} ${VERILOG_FILES[*]}" + yosys_files="" fi -yosys -p "$yosys_read_cmds ${VERILOG_FILES[*]}; tcl $(python3 -m f4pga.wrappers.tcl)" -l "${TOP}_synth.log" +yosys \ + -p "$yosys_read_cmds; tcl $(python3 -m f4pga.wrappers.tcl)" \ + -l "${TOP}_synth.log" \ + $yosys_files