From d8d96ff3aba6d5176b429a8624e161e623ac3977 Mon Sep 17 00:00:00 2001
From: Robert Winkler <rwinkler@antmicro.com>
Date: Thu, 10 Sep 2020 19:27:35 +0200
Subject: [PATCH] Add sphinx-verilog-domain to Sphinx configuration

Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
---
 requirements.txt | 1 +
 source/conf.py   | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/requirements.txt b/requirements.txt
index 8976f8f..9d7f943 100644
--- a/requirements.txt
+++ b/requirements.txt
@@ -1,5 +1,6 @@
 Sphinx==3.0.4
 git+http://github.com/SymbiFlow/sphinx_materialdesign_theme.git@master#egg=sphinx_symbiflow_theme
+git+http://github.com/SymbiFlow/sphinx-verilog-domain
 sphinx-markdown-tables==0.0.12
 breathe==4.18.1
 symbolator==1.0.2
diff --git a/source/conf.py b/source/conf.py
index 53b33f1..79cab71 100644
--- a/source/conf.py
+++ b/source/conf.py
@@ -36,7 +36,8 @@ extensions = [
     'sdcdomain',
     'archdomain',
     'rrgraphdomain',
-    'recommonmark'
+    'recommonmark',
+    'sphinx_verilog_domain'
 ]
 
 numfig = True