diff --git a/docs/conf.py b/docs/conf.py
index 3906f48..4302418 100644
--- a/docs/conf.py
+++ b/docs/conf.py
@@ -43,6 +43,7 @@ version = ''
 release = '' # The full version, including alpha/beta/rc tags.
 
 extensions = [
+    'sphinx.ext.extlinks',
     'sphinx.ext.intersphinx',
     'sphinx_verilog_domain'
 ]
@@ -140,3 +141,14 @@ intersphinx_mapping = {
     "prjxray": ("https://f4pga.readthedocs.io/projects/prjxray/en/latest/", None),
     "vtr": ("https://docs.verilogtorouting.org/en/latest/", None),
 }
+
+# -- Sphinx.Ext.ExtLinks -----------------------------------------------------------------------------------------------
+
+extlinks = {
+   'wikipedia': ('https://en.wikipedia.org/wiki/%s', 'wikipedia:'),
+   'gh':        ('https://github.com/%s', 'gh:'),
+   'ghsharp':   ('https://github.com/chipsalliance/f4pga/issues/%s', '#'),
+   'ghissue':   ('https://github.com/chipsalliance/f4pga/issues/%s', 'issue #'),
+   'ghpull':    ('https://github.com/chipsalliance/f4pga/pull/%s', 'pull request #'),
+   'ghsrc':     ('https://github.com/chipsalliance/f4pga/blob/master/%s', '')
+}