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FOSS Flow For FPGA
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dependabot[bot] 77d5eaeb26
build(deps): bump actions/setup-python from 2 to 4 (#622) 
Bumps [actions/setup-python](https://github.com/actions/setup-python) from 2 to 4.
- [Release notes](https://github.com/actions/setup-python/releases)
- [Commits](https://github.com/actions/setup-python/compare/v2...v4)

---
updated-dependencies:
- dependency-name: actions/setup-python
  dependency-type: direct:production
  update-type: version-update:semver-major
...

Signed-off-by: dependabot[bot] <support@github.com>

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
 		2022-08-22 02:20:38 +00:00
.github build(deps): bump actions/setup-python from 2 to 4 (#622) 2022-08-22 02:20:38 +00:00
docs docs/changes: fix indentation 2022-08-11 15:58:07 +02:00
f4pga f4pga/flows/common_modules/synth: cleanup 2022-08-19 18:41:19 +02:00
scripts mv .github/scripts ./ 2022-08-10 11:41:19 +02:00
test ci: add job 'Format' 2022-08-19 18:33:57 +02:00
third_party Bump third_party/make-env from `0696632` to `59adb0f` 2021-04-16 05:36:52 +00:00
.gitattributes add .gitattributes and .gitcommit 2022-08-02 02:21:30 +02:00
.gitcommit add .gitattributes and .gitcommit 2022-08-02 02:21:30 +02:00
.gitignore f4pga: cleanup and style 2022-04-26 12:16:38 +02:00
.gitmodules use intersphinx instead of adding submodules 2022-02-10 04:14:26 +01:00
LICENSE docs: s/http:/https:/ 2022-04-05 13:34:02 +02:00
README.md readme: content moved to the index of the docs 2022-08-10 11:41:19 +02:00
readthedocs.yml add missing headers 2022-06-02 00:35:06 +02:00

README.md

FOSS Flows For FPGA (F4PGA) project

'Automerge' workflow status

This is the top-level repository for the F4PGA project, which is a Workgroup under the CHIPS Alliance; consisting of members from different backgrounds, including FPGA vendors, industrial users and academia (see Documentation > Community); who collaborate to build a more open source and software-driven FPGA ecosystem (IP, tools and workflows) to drive the adoption of FPGAs in existing and new use cases, and eliminate barriers of entry.