2016-04-29 01:12:21 -04:00
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#!/usr/bin/env python3
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from setuptools import setup
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from setuptools import find_packages
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2023-04-07 18:59:14 -04:00
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with open("README.md", "r") as fp:
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long_description = fp.read()
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2016-04-29 01:12:21 -04:00
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setup(
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name="litedram",
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2018-02-22 04:10:54 -05:00
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description="Small footprint and configurable DRAM core",
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2023-04-07 18:59:14 -04:00
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long_description=long_description,
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long_description_content_type="text/markdown",
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2018-01-12 21:22:08 -05:00
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author="Florent Kermarrec",
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2023-04-07 18:59:14 -04:00
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version="2022.12",
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2018-01-12 21:22:08 -05:00
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author_email="florent@enjoy-digital.fr",
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url="http://enjoy-digital.fr",
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2016-04-29 01:12:21 -04:00
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download_url="https://github.com/enjoy-digital/litedram",
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2017-01-17 09:17:21 -05:00
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test_suite="test",
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2016-04-29 01:12:21 -04:00
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license="BSD",
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2020-04-07 05:51:23 -04:00
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python_requires="~=3.6",
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2023-04-07 18:59:14 -04:00
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install_requires=["pyyaml", "litex"],
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extras_require={
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"develop": [
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"meson"
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"pexpect"
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"setuptools"
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"requests"
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]
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},
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2018-08-31 02:25:05 -04:00
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packages=find_packages(exclude=("test*", "sim*", "doc*", "examples*")),
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2016-04-29 01:12:21 -04:00
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include_package_data=True,
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2023-04-07 18:59:14 -04:00
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keywords="HDL ASIC FPGA hardware design",
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classifiers=[
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"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
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"Environment :: Console",
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"Development Status :: 3 - Alpha",
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"Intended Audience :: Developers",
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"License :: OSI Approved :: BSD License",
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"Operating System :: OS Independent",
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"Programming Language :: Python",
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],
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2019-08-28 01:19:30 -04:00
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entry_points={
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"console_scripts": [
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"litedram_gen=litedram.gen:main",
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],
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},
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2016-04-29 01:12:21 -04:00
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)
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