diff --git a/litedram/phy/s7ddrphy.py b/litedram/phy/s7ddrphy.py
index 68eb131..3daa2fa 100644
--- a/litedram/phy/s7ddrphy.py
+++ b/litedram/phy/s7ddrphy.py
@@ -62,7 +62,7 @@ class S7DDRPHY(Module, AutoCSR):
         }
 
         half_sys8x_taps = math.floor(tck/(4*iodelay_tap_average[iodelay_clk_freq]))
-        self._half_sys8x_taps = CSRStorage(4, reset=half_sys8x_taps)
+        self._half_sys8x_taps = CSRStorage(5, reset=half_sys8x_taps)
 
         if with_odelay:
             self._wlevel_en = CSRStorage()