diff --git a/test/reference/ddr3_init.h b/test/reference/ddr3_init.h
index e8f2f06..f38605a 100644
--- a/test/reference/ddr3_init.h
+++ b/test/reference/ddr3_init.h
@@ -16,6 +16,8 @@
 #define DFII_COMMAND_RDDATA     0x20
 
 #define SDRAM_PHY_K7DDRPHY
+#define SDRAM_PHY_XDR 2
+#define SDRAM_PHY_DATABITS 64
 #define SDRAM_PHY_PHASES 4
 #define SDRAM_PHY_WRITE_LEVELING_CAPABLE
 #define SDRAM_PHY_READ_LEVELING_CAPABLE
diff --git a/test/reference/ddr4_init.h b/test/reference/ddr4_init.h
index ba42f19..90662f5 100644
--- a/test/reference/ddr4_init.h
+++ b/test/reference/ddr4_init.h
@@ -16,6 +16,8 @@
 #define DFII_COMMAND_RDDATA     0x20
 
 #define SDRAM_PHY_USDDRPHY
+#define SDRAM_PHY_XDR 2
+#define SDRAM_PHY_DATABITS 64
 #define SDRAM_PHY_PHASES 4
 #define SDRAM_PHY_WRITE_LEVELING_CAPABLE
 #define SDRAM_PHY_WRITE_LEVELING_REINIT
diff --git a/test/reference/sdr_init.h b/test/reference/sdr_init.h
index 81f975a..5f7b081 100644
--- a/test/reference/sdr_init.h
+++ b/test/reference/sdr_init.h
@@ -16,6 +16,8 @@
 #define DFII_COMMAND_RDDATA     0x20
 
 #define SDRAM_PHY_GENSDRPHY
+#define SDRAM_PHY_XDR 1
+#define SDRAM_PHY_DATABITS 16
 #define SDRAM_PHY_PHASES 1
 
 static void cdelay(int i);