From 28b7d3264c15c4fa1b315fd4f92fbd9bf5af5759 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 17 Dec 2018 11:04:45 +0100 Subject: [PATCH] phy/kusddrphy: use rdly_dq_bitslip_rst CSR for bitslip reset --- litedram/phy/kusddrphy.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litedram/phy/kusddrphy.py b/litedram/phy/kusddrphy.py index 442e25a..8f6d4bd 100644 --- a/litedram/phy/kusddrphy.py +++ b/litedram/phy/kusddrphy.py @@ -340,7 +340,7 @@ class KUSDDRPHY(Module, AutoCSR): dq_bitslip = BitSlip(8) self.sync += \ If(self._dly_sel.storage[i//8], - If(self._wdly_dq_rst.re, + If(self._rdly_dq_bitslip_rst.re, dq_bitslip.value.eq(0) ).Elif(self._rdly_dq_bitslip.re, dq_bitslip.value.eq(dq_bitslip.value + 1)