diff --git a/litedram/modules.py b/litedram/modules.py index addc1b8..ec5f4ba 100644 --- a/litedram/modules.py +++ b/litedram/modules.py @@ -9,6 +9,7 @@ # This file is Copyright (c) 2018 Tim 'mithro' Ansell # This file is Copyright (c) 2018 Daniel Kucera # This file is Copyright (c) 2018 Mikołaj Sowiński +# This file is Copyright (c) 2020 Antmicro # License: BSD from math import ceil @@ -33,6 +34,117 @@ class _SpeedgradeTimings(Settings): def __init__(self, tRP, tRCD, tWR, tRFC, tFAW, tRAS): self.set_attributes(locals()) +# SPD ---------------------------------------------------------------------------------------------- + +def _read_field(byte, nbits, shift): + mask = 2**nbits - 1 + return (byte & (mask << shift)) >> shift + +def _twos_complement(value, nbits): + if value & (1 << (nbits - 1)): + value -= (1 << nbits) + return value + +def _word(msb, lsb): + return (msb << 8) | lsb + + +class DDR3SPDData: + memtype = "DDR3" + + def __init__(self, spd_data): + # Geometry --------------------------------------------------------------------------------- + bankbits = { + 0b000: 3, + 0b001: 4, + 0b010: 5, + 0b011: 6, + }[_read_field(spd_data[4], nbits=3, shift=4)] + rowbits = { + 0b000: 12, + 0b001: 13, + 0b010: 14, + 0b011: 15, + 0b100: 16, + }[_read_field(spd_data[5], nbits=3, shift=3)] + colbits = { + 0b000: 9, + 0b001: 10, + 0b010: 11, + 0b011: 12, + }[_read_field(spd_data[5], nbits=3, shift=0)] + + self.nbanks = 2**bankbits + self.nrows = 2**rowbits + self.ncols = 2**colbits + + # Timings ---------------------------------------------------------------------------------- + self.init_timebase(spd_data) + + # most signifficant (upper) / least signifficant (lower) nibble + def msn(byte): + return _read_field(byte, nbits=4, shift=4) + + def lsn(byte): + return _read_field(byte, nbits=4, shift=0) + + b = spd_data + tck_min = self.txx_ns(mtb=b[12], ftb=b[34]) + taa_min = self.txx_ns(mtb=b[16], ftb=b[35]) + twr_min = self.txx_ns(mtb=b[17]) + trcd_min = self.txx_ns(mtb=b[18], ftb=b[36]) + trrd_min = self.txx_ns(mtb=b[19]) + trp_min = self.txx_ns(mtb=b[20], ftb=b[37]) + tras_min = self.txx_ns(mtb=_word(lsn(b[21]), b[22])) + trc_min = self.txx_ns(mtb=_word(msn(b[21]), b[23]), ftb=b[38]) + trfc_min = self.txx_ns(mtb=_word(b[25], b[24])) + twtr_min = self.txx_ns(mtb=b[26]) + trtp_min = self.txx_ns(mtb=b[27]) + tfaw_min = self.txx_ns(mtb=_word(lsn(b[28]), b[29])) + + # calculate speedgrade + freq_mhz = (1 / (tck_min * 1e-9)) / 1e6 + speedgrade = str(int(freq_mhz * 2)) + + technology_timings = _TechnologyTimings( + tREFI = 64e6/8192, # 64ms/8192ops + tWTR = (4, twtr_min), # min 4 cycles + tCCD = (4, None), # min 4 cycles + tRRD = (4, trrd_min), # min 4 cycles + tZQCS = (64, 80), + ) + speedgrade_timings = _SpeedgradeTimings( + tRP = trp_min, + tRCD = trcd_min, + tWR = twr_min, + tRFC = (None, trfc_min), + tFAW = (None, tfaw_min), + tRAS = tras_min, + ) + + self.technology_timings = technology_timings + self.speedgrade_timings = { + speedgrade: speedgrade_timings, + "default": speedgrade_timings, + } + + def init_timebase(self, data): + # All the DDR3 timings are defined in the units of "timebase", which + # consists of medium timebase (nanosec) and fine timebase (picosec). + fine_timebase_dividend = _read_field(data[9], nbits=4, shift=4) + fine_timebase_divisor = _read_field(data[9], nbits=4, shift=0) + fine_timebase_ps = fine_timebase_dividend / fine_timebase_divisor + self.fine_timebase_ns = fine_timebase_ps * 1e-3 + medium_timebase_dividend = data[10] + medium_timebase_divisor = data[11] + self.medium_timebase_ns = medium_timebase_dividend / medium_timebase_divisor + + def txx_ns(self, mtb, ftb=0): + """Get tXX in nanoseconds from medium and (optional) fine timebase.""" + # decode FTB encoded in 8-bit two's complement + ftb = _twos_complement(ftb, 8) + return mtb * self.medium_timebase_ns + ftb * self.fine_timebase_ns + # SDRAMModule -------------------------------------------------------------------------------------- class SDRAMModule: @@ -123,6 +235,25 @@ class SDRAMModule: t = 0 if t is None else t return max(self.ck_to_cycles(c), self.ns_to_cycles(t)) + @classmethod + def from_spd_data(cls, spd_data, *args, **kwargs): + # set parameters from SPD data based on memory type + spd_cls = { + 0x0b: DDR3SPDData, + }[spd_data[2]] + spd = spd_cls(spd_data) + + # Create a deriving class to avoid modifying this one + class _SDRAMModule(cls): + memtype = spd.memtype + nbanks = spd.nbanks + nrows = spd.nrows + ncols = spd.ncols + technology_timings = spd.technology_timings + speedgrade_timings = spd.speedgrade_timings + + return _SDRAMModule(*args, **kwargs) + # SDR ---------------------------------------------------------------------------------------------- class IS42S16160(SDRAMModule): diff --git a/test/spd_data/MT16KTF1G64HZ-1G6N1.csv b/test/spd_data/MT16KTF1G64HZ-1G6N1.csv new file mode 100644 index 0000000..eee3994 --- /dev/null +++ b/test/spd_data/MT16KTF1G64HZ-1G6N1.csv @@ -0,0 +1,76 @@ +Part Number,Byte Number,Byte Description,Byte Value +MT16KTF1G64HZ-1G6N1,0,DDR3-CRC RANGE; EEPROM BYTES; BYTES USED,92 +MT16KTF1G64HZ-1G6N1,1,DDR3-SPD REVISON,13 +MT16KTF1G64HZ-1G6N1,2,DDR3-DRAM DEVICE TYPE,0B +MT16KTF1G64HZ-1G6N1,3,DDR3-MODULE TYPE (FORM FACTOR),03 +MT16KTF1G64HZ-1G6N1,4,DDR3-SDRAM DEVICE DENSITY BANKS,04 +MT16KTF1G64HZ-1G6N1,5,DDR3-SDRAM DEVICE ROW COLUMN COUNT,21 +MT16KTF1G64HZ-1G6N1,6,DDR3-MODULE NOMINAL VDD,02 +MT16KTF1G64HZ-1G6N1,7,DDR3-MODULE RANKS DEVICE DQ COUNT,09 +MT16KTF1G64HZ-1G6N1,8,DDR3-ECC TAG MODULE MEMORY BUS WIDTH,03 +MT16KTF1G64HZ-1G6N1,9,DDR3-FINE TIMEBASE DIVIDEND/DIVISOR,11 +MT16KTF1G64HZ-1G6N1,10,DDR3-MEDIUM TIMEBASE DIVIDEND,01 +MT16KTF1G64HZ-1G6N1,11,DDR3-MEDIUM TIMEBASE DIVISOR,08 +MT16KTF1G64HZ-1G6N1,12,DDR3-MIN SDRAM CYCLE TIME (TCKMIN),0A +MT16KTF1G64HZ-1G6N1,13,DDR3-BYTE 13 RESERVED,00 +MT16KTF1G64HZ-1G6N1,14,DDR3-CAS LATENCIES SUPPORTED (CL4 => CL11),FE +MT16KTF1G64HZ-1G6N1,15,DDR3-CAS LATENCIES SUPPORTED (CL12 => CL18),00 +MT16KTF1G64HZ-1G6N1,16,DDR3-MIN CAS LATENCY TIME (TAAMIN),69 +MT16KTF1G64HZ-1G6N1,17,DDR3-MIN WRITE RECOVERY TIME (TWRMIN),78 +MT16KTF1G64HZ-1G6N1,18,DDR3-MIN RAS# TO CAS# DELAY (TRCDMIN),69 +MT16KTF1G64HZ-1G6N1,19,DDR3-MIN ROW ACTIVE TO ROW ACTIVE DELAY (TRRDMIN),30 +MT16KTF1G64HZ-1G6N1,20,DDR3-MIN ROW PRECHARGE DELAY (TRPMIN),69 +MT16KTF1G64HZ-1G6N1,21,DDR3-UPPER NIBBLE FOR TRAS TRC,11 +MT16KTF1G64HZ-1G6N1,22,DDR3-MIN ACTIVE TO PRECHARGE DELAY (TRASMIN),18 +MT16KTF1G64HZ-1G6N1,23,DDR3-MIN ACTIVE TO ACTIVE/REFRESH DELAY (TRCMIN),81 +MT16KTF1G64HZ-1G6N1,24,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) LSB,20 +MT16KTF1G64HZ-1G6N1,25,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) MSB,08 +MT16KTF1G64HZ-1G6N1,26,DDR3-MIN INTERNAL WRITE TO READ CMD DELAY (TWTRMIN),3C +MT16KTF1G64HZ-1G6N1,27,DDR3-MIN INTERNAL READ TO PRECHARGE CMD DELAY (TRTPMIN),3C +MT16KTF1G64HZ-1G6N1,28,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) MSB,00 +MT16KTF1G64HZ-1G6N1,29,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) LSB,F0 +MT16KTF1G64HZ-1G6N1,30,DDR3-SDRAM DEVICE OUTPUT DRIVERS SUPPORTED,83 +MT16KTF1G64HZ-1G6N1,31,DDR3-SDRAM DEVICE THERMAL REFRESH OPTIONS,05 +MT16KTF1G64HZ-1G6N1,32,DDR3-MODULE THERMAL SENSOR,00 +MT16KTF1G64HZ-1G6N1,33,DDR3-SDRAM DEVICE TYPE,00 +MT16KTF1G64HZ-1G6N1,34,DDR3-FINE OFFSET FOR TCKMIN,00 +MT16KTF1G64HZ-1G6N1,35,DDR3-FINE OFFSET FOR TAAMIN,00 +MT16KTF1G64HZ-1G6N1,36,DDR3-FINE OFFSET FOR TRCDMIN,00 +MT16KTF1G64HZ-1G6N1,37,DDR3-FINE OFFSET FOR TRPMIN,00 +MT16KTF1G64HZ-1G6N1,38,DDR3-FINE OFFSET FOR TRCMIN,00 +MT16KTF1G64HZ-1G6N1,39,DDR3-BYTE 39 RESERVED,00 +MT16KTF1G64HZ-1G6N1,40,DDR3-BYTE 40 RESERVED,00 +MT16KTF1G64HZ-1G6N1,41,DDR3-PTRR TMAW MAC,88 +MT16KTF1G64HZ-1G6N1,42-59,DDR3-RESERVED BYTES 42-59,000000000000000000000000000000000000 +MT16KTF1G64HZ-1G6N1,60,DDR3-RC REV NOM MODULE HEIGHT,0F +MT16KTF1G64HZ-1G6N1,61,DDR3-MODULE THICKNESS (MAX),11 +MT16KTF1G64HZ-1G6N1,62,DDR3-REFERENCE RAW CARD ID,65 +MT16KTF1G64HZ-1G6N1,63,DDR3 - ADDRESS MAPPING/MODULE ATTRIBUTES,00 +MT16KTF1G64HZ-1G6N1,64,DDR3-HEATSPREADER SOLUTION,00 +MT16KTF1G64HZ-1G6N1,65,DDR3-REGISTER VENDOR ID (LSB),00 +MT16KTF1G64HZ-1G6N1,66,DDR3-REGISTER VENDOR ID (MSB),00 +MT16KTF1G64HZ-1G6N1,67,DDR3-REGISTER REVISON NUMBER,00 +MT16KTF1G64HZ-1G6N1,68,DDR3-REGISTER TYPE,00 +MT16KTF1G64HZ-1G6N1,69,DDR3-REG CTRL WORDS 1 AND ZERO,00 +MT16KTF1G64HZ-1G6N1,70,DDR3-REG CTRL WORDS 3 AND 2,00 +MT16KTF1G64HZ-1G6N1,71,DDR3-REG CTRL WORDS 5 AND 4,00 +MT16KTF1G64HZ-1G6N1,72,DDR3-REG CTRL WORDS 7 AND 6,00 +MT16KTF1G64HZ-1G6N1,73,DDR3-REG CTRL WORDS 9 AND 8,00 +MT16KTF1G64HZ-1G6N1,74,DDR3-REG CTRL WORDS 11 AND 10,00 +MT16KTF1G64HZ-1G6N1,75,DDR3-REG CTRL WORDS 13 AND 12,00 +MT16KTF1G64HZ-1G6N1,76,DDR3-REG CTRL WORDS 15 AND 14,00 +MT16KTF1G64HZ-1G6N1,77-116,DDR3-RESERVED BYTES 77-116,00000000000000000000000000000000000000000000000000000000000000000000000000000000 +MT16KTF1G64HZ-1G6N1,117,DDR3-MODULE MFR ID (LSB),80 +MT16KTF1G64HZ-1G6N1,118,DDR3-MODULE MFR ID (MSB),2C +MT16KTF1G64HZ-1G6N1,119,DDR3-MODULE MFR LOCATION ID,00 +MT16KTF1G64HZ-1G6N1,120,DDR3-MODULE MFR YEAR,00 +MT16KTF1G64HZ-1G6N1,121,DDR3-MODULE MFR WEEK,00 +MT16KTF1G64HZ-1G6N1,122-125,DDR3-MODULE SERIAL NUMBER,00000000 +MT16KTF1G64HZ-1G6N1,126-127,DDR3-CRC,5759 +MT16KTF1G64HZ-1G6N1,128-145,DDR3-MODULE PART NUMBER,16KTF1G64HZ-1G6N1 +MT16KTF1G64HZ-1G6N1,146,DDR3-MODULE DIE REV,4E +MT16KTF1G64HZ-1G6N1,147,DDR3-MODULE PCB REV,31 +MT16KTF1G64HZ-1G6N1,148,DDR3-DRAM DEVICE MFR ID (LSB),80 +MT16KTF1G64HZ-1G6N1,149,DDR3-DRAM DEVICE MFR (MSB),2C +MT16KTF1G64HZ-1G6N1,150-175,DDR3-MFR RESERVED BYTES 150-175,0000000000000000000000000000000000000000000000000000 +MT16KTF1G64HZ-1G6N1,176-255,DDR3-CUSTOMER RESERVED BYTES 176-255,FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF \ No newline at end of file diff --git a/test/spd_data/MT16KTF1G64HZ-1G9E1.csv b/test/spd_data/MT16KTF1G64HZ-1G9E1.csv new file mode 100644 index 0000000..ac33154 --- /dev/null +++ b/test/spd_data/MT16KTF1G64HZ-1G9E1.csv @@ -0,0 +1,76 @@ +Part Number,Byte Number,Byte Description,Byte Value +MT16KTF1G64HZ-1G9E1,0,DDR3-CRC RANGE; EEPROM BYTES; BYTES USED,92 +MT16KTF1G64HZ-1G9E1,1,DDR3-SPD REVISON,13 +MT16KTF1G64HZ-1G9E1,2,DDR3-DRAM DEVICE TYPE,0B +MT16KTF1G64HZ-1G9E1,3,DDR3-MODULE TYPE (FORM FACTOR),03 +MT16KTF1G64HZ-1G9E1,4,DDR3-SDRAM DEVICE DENSITY BANKS,04 +MT16KTF1G64HZ-1G9E1,5,DDR3-SDRAM DEVICE ROW COLUMN COUNT,21 +MT16KTF1G64HZ-1G9E1,6,DDR3-MODULE NOMINAL VDD,02 +MT16KTF1G64HZ-1G9E1,7,DDR3-MODULE RANKS DEVICE DQ COUNT,09 +MT16KTF1G64HZ-1G9E1,8,DDR3-ECC TAG MODULE MEMORY BUS WIDTH,03 +MT16KTF1G64HZ-1G9E1,9,DDR3-FINE TIMEBASE DIVIDEND/DIVISOR,11 +MT16KTF1G64HZ-1G9E1,10,DDR3-MEDIUM TIMEBASE DIVIDEND,01 +MT16KTF1G64HZ-1G9E1,11,DDR3-MEDIUM TIMEBASE DIVISOR,08 +MT16KTF1G64HZ-1G9E1,12,DDR3-MIN SDRAM CYCLE TIME (TCKMIN),09 +MT16KTF1G64HZ-1G9E1,13,DDR3-BYTE 13 RESERVED,00 +MT16KTF1G64HZ-1G9E1,14,DDR3-CAS LATENCIES SUPPORTED (CL4 => CL11),FE +MT16KTF1G64HZ-1G9E1,15,DDR3-CAS LATENCIES SUPPORTED (CL12 => CL18),02 +MT16KTF1G64HZ-1G9E1,16,DDR3-MIN CAS LATENCY TIME (TAAMIN),69 +MT16KTF1G64HZ-1G9E1,17,DDR3-MIN WRITE RECOVERY TIME (TWRMIN),78 +MT16KTF1G64HZ-1G9E1,18,DDR3-MIN RAS# TO CAS# DELAY (TRCDMIN),69 +MT16KTF1G64HZ-1G9E1,19,DDR3-MIN ROW ACTIVE TO ROW ACTIVE DELAY (TRRDMIN),28 +MT16KTF1G64HZ-1G9E1,20,DDR3-MIN ROW PRECHARGE DELAY (TRPMIN),69 +MT16KTF1G64HZ-1G9E1,21,DDR3-UPPER NIBBLE FOR TRAS TRC,11 +MT16KTF1G64HZ-1G9E1,22,DDR3-MIN ACTIVE TO PRECHARGE DELAY (TRASMIN),10 +MT16KTF1G64HZ-1G9E1,23,DDR3-MIN ACTIVE TO ACTIVE/REFRESH DELAY (TRCMIN),79 +MT16KTF1G64HZ-1G9E1,24,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) LSB,20 +MT16KTF1G64HZ-1G9E1,25,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) MSB,08 +MT16KTF1G64HZ-1G9E1,26,DDR3-MIN INTERNAL WRITE TO READ CMD DELAY (TWTRMIN),3C +MT16KTF1G64HZ-1G9E1,27,DDR3-MIN INTERNAL READ TO PRECHARGE CMD DELAY (TRTPMIN),3C +MT16KTF1G64HZ-1G9E1,28,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) MSB,00 +MT16KTF1G64HZ-1G9E1,29,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) LSB,D8 +MT16KTF1G64HZ-1G9E1,30,DDR3-SDRAM DEVICE OUTPUT DRIVERS SUPPORTED,83 +MT16KTF1G64HZ-1G9E1,31,DDR3-SDRAM DEVICE THERMAL REFRESH OPTIONS,05 +MT16KTF1G64HZ-1G9E1,32,DDR3-MODULE THERMAL SENSOR,00 +MT16KTF1G64HZ-1G9E1,33,DDR3-SDRAM DEVICE TYPE,00 +MT16KTF1G64HZ-1G9E1,34,DDR3-FINE OFFSET FOR TCKMIN,CA +MT16KTF1G64HZ-1G9E1,35,DDR3-FINE OFFSET FOR TAAMIN,00 +MT16KTF1G64HZ-1G9E1,36,DDR3-FINE OFFSET FOR TRCDMIN,00 +MT16KTF1G64HZ-1G9E1,37,DDR3-FINE OFFSET FOR TRPMIN,00 +MT16KTF1G64HZ-1G9E1,38,DDR3-FINE OFFSET FOR TRCMIN,00 +MT16KTF1G64HZ-1G9E1,39,DDR3-BYTE 39 RESERVED,00 +MT16KTF1G64HZ-1G9E1,40,DDR3-BYTE 40 RESERVED,00 +MT16KTF1G64HZ-1G9E1,41,DDR3-PTRR TMAW MAC,84 +MT16KTF1G64HZ-1G9E1,42-59,DDR3-RESERVED BYTES 42-59,000000000000000000000000000000000000 +MT16KTF1G64HZ-1G9E1,60,DDR3-RC REV NOM MODULE HEIGHT,0F +MT16KTF1G64HZ-1G9E1,61,DDR3-MODULE THICKNESS (MAX),11 +MT16KTF1G64HZ-1G9E1,62,DDR3-REFERENCE RAW CARD ID,05 +MT16KTF1G64HZ-1G9E1,63,DDR3 - ADDRESS MAPPING/MODULE ATTRIBUTES,00 +MT16KTF1G64HZ-1G9E1,64,DDR3-HEATSPREADER SOLUTION,00 +MT16KTF1G64HZ-1G9E1,65,DDR3-REGISTER VENDOR ID (LSB),00 +MT16KTF1G64HZ-1G9E1,66,DDR3-REGISTER VENDOR ID (MSB),00 +MT16KTF1G64HZ-1G9E1,67,DDR3-REGISTER REVISON NUMBER,00 +MT16KTF1G64HZ-1G9E1,68,DDR3-REGISTER TYPE,00 +MT16KTF1G64HZ-1G9E1,69,DDR3-REG CTRL WORDS 1 AND ZERO,00 +MT16KTF1G64HZ-1G9E1,70,DDR3-REG CTRL WORDS 3 AND 2,00 +MT16KTF1G64HZ-1G9E1,71,DDR3-REG CTRL WORDS 5 AND 4,00 +MT16KTF1G64HZ-1G9E1,72,DDR3-REG CTRL WORDS 7 AND 6,00 +MT16KTF1G64HZ-1G9E1,73,DDR3-REG CTRL WORDS 9 AND 8,00 +MT16KTF1G64HZ-1G9E1,74,DDR3-REG CTRL WORDS 11 AND 10,00 +MT16KTF1G64HZ-1G9E1,75,DDR3-REG CTRL WORDS 13 AND 12,00 +MT16KTF1G64HZ-1G9E1,76,DDR3-REG CTRL WORDS 15 AND 14,00 +MT16KTF1G64HZ-1G9E1,77-116,DDR3-RESERVED BYTES 77-116,00000000000000000000000000000000000000000000000000000000000000000000000000000000 +MT16KTF1G64HZ-1G9E1,117,DDR3-MODULE MFR ID (LSB),80 +MT16KTF1G64HZ-1G9E1,118,DDR3-MODULE MFR ID (MSB),2C +MT16KTF1G64HZ-1G9E1,119,DDR3-MODULE MFR LOCATION ID,00 +MT16KTF1G64HZ-1G9E1,120,DDR3-MODULE MFR YEAR,00 +MT16KTF1G64HZ-1G9E1,121,DDR3-MODULE MFR WEEK,00 +MT16KTF1G64HZ-1G9E1,122-125,DDR3-MODULE SERIAL NUMBER,00000000 +MT16KTF1G64HZ-1G9E1,126-127,DDR3-CRC,DDA5 +MT16KTF1G64HZ-1G9E1,128-145,DDR3-MODULE PART NUMBER,16KTF1G64HZ-1G9E1 +MT16KTF1G64HZ-1G9E1,146,DDR3-MODULE DIE REV,45 +MT16KTF1G64HZ-1G9E1,147,DDR3-MODULE PCB REV,31 +MT16KTF1G64HZ-1G9E1,148,DDR3-DRAM DEVICE MFR ID (LSB),80 +MT16KTF1G64HZ-1G9E1,149,DDR3-DRAM DEVICE MFR (MSB),2C +MT16KTF1G64HZ-1G9E1,150-175,DDR3-MFR RESERVED BYTES 150-175,0000000000000000000000000000000000000000000000000000 +MT16KTF1G64HZ-1G9E1,176-255,DDR3-CUSTOMER RESERVED BYTES 176-255,FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF \ No newline at end of file diff --git a/test/spd_data/MT18KSF1G72HZ-1G6E2.csv b/test/spd_data/MT18KSF1G72HZ-1G6E2.csv new file mode 100644 index 0000000..1cffcf3 --- /dev/null +++ b/test/spd_data/MT18KSF1G72HZ-1G6E2.csv @@ -0,0 +1,76 @@ +Part Number,Byte Number,Byte Description,Byte Value +MT18KSF1G72HZ-1G6E2,0,DDR3-CRC RANGE; EEPROM BYTES; BYTES USED,92 +MT18KSF1G72HZ-1G6E2,1,DDR3-SPD REVISON,13 +MT18KSF1G72HZ-1G6E2,2,DDR3-DRAM DEVICE TYPE,0B +MT18KSF1G72HZ-1G6E2,3,DDR3-MODULE TYPE (FORM FACTOR),08 +MT18KSF1G72HZ-1G6E2,4,DDR3-SDRAM DEVICE DENSITY BANKS,04 +MT18KSF1G72HZ-1G6E2,5,DDR3-SDRAM DEVICE ROW COLUMN COUNT,21 +MT18KSF1G72HZ-1G6E2,6,DDR3-MODULE NOMINAL VDD,02 +MT18KSF1G72HZ-1G6E2,7,DDR3-MODULE RANKS DEVICE DQ COUNT,09 +MT18KSF1G72HZ-1G6E2,8,DDR3-ECC TAG MODULE MEMORY BUS WIDTH,0B +MT18KSF1G72HZ-1G6E2,9,DDR3-FINE TIMEBASE DIVIDEND/DIVISOR,11 +MT18KSF1G72HZ-1G6E2,10,DDR3-MEDIUM TIMEBASE DIVIDEND,01 +MT18KSF1G72HZ-1G6E2,11,DDR3-MEDIUM TIMEBASE DIVISOR,08 +MT18KSF1G72HZ-1G6E2,12,DDR3-MIN SDRAM CYCLE TIME (TCKMIN),0A +MT18KSF1G72HZ-1G6E2,13,DDR3-BYTE 13 RESERVED,00 +MT18KSF1G72HZ-1G6E2,14,DDR3-CAS LATENCIES SUPPORTED (CL4 => CL11),FE +MT18KSF1G72HZ-1G6E2,15,DDR3-CAS LATENCIES SUPPORTED (CL12 => CL18),00 +MT18KSF1G72HZ-1G6E2,16,DDR3-MIN CAS LATENCY TIME (TAAMIN),69 +MT18KSF1G72HZ-1G6E2,17,DDR3-MIN WRITE RECOVERY TIME (TWRMIN),78 +MT18KSF1G72HZ-1G6E2,18,DDR3-MIN RAS# TO CAS# DELAY (TRCDMIN),69 +MT18KSF1G72HZ-1G6E2,19,DDR3-MIN ROW ACTIVE TO ROW ACTIVE DELAY (TRRDMIN),30 +MT18KSF1G72HZ-1G6E2,20,DDR3-MIN ROW PRECHARGE DELAY (TRPMIN),69 +MT18KSF1G72HZ-1G6E2,21,DDR3-UPPER NIBBLE FOR TRAS TRC,11 +MT18KSF1G72HZ-1G6E2,22,DDR3-MIN ACTIVE TO PRECHARGE DELAY (TRASMIN),18 +MT18KSF1G72HZ-1G6E2,23,DDR3-MIN ACTIVE TO ACTIVE/REFRESH DELAY (TRCMIN),81 +MT18KSF1G72HZ-1G6E2,24,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) LSB,20 +MT18KSF1G72HZ-1G6E2,25,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) MSB,08 +MT18KSF1G72HZ-1G6E2,26,DDR3-MIN INTERNAL WRITE TO READ CMD DELAY (TWTRMIN),3C +MT18KSF1G72HZ-1G6E2,27,DDR3-MIN INTERNAL READ TO PRECHARGE CMD DELAY (TRTPMIN),3C +MT18KSF1G72HZ-1G6E2,28,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) MSB,00 +MT18KSF1G72HZ-1G6E2,29,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) LSB,F0 +MT18KSF1G72HZ-1G6E2,30,DDR3-SDRAM DEVICE OUTPUT DRIVERS SUPPORTED,83 +MT18KSF1G72HZ-1G6E2,31,DDR3-SDRAM DEVICE THERMAL REFRESH OPTIONS,05 +MT18KSF1G72HZ-1G6E2,32,DDR3-MODULE THERMAL SENSOR,80 +MT18KSF1G72HZ-1G6E2,33,DDR3-SDRAM DEVICE TYPE,00 +MT18KSF1G72HZ-1G6E2,34,DDR3-FINE OFFSET FOR TCKMIN,00 +MT18KSF1G72HZ-1G6E2,35,DDR3-FINE OFFSET FOR TAAMIN,00 +MT18KSF1G72HZ-1G6E2,36,DDR3-FINE OFFSET FOR TRCDMIN,00 +MT18KSF1G72HZ-1G6E2,37,DDR3-FINE OFFSET FOR TRPMIN,00 +MT18KSF1G72HZ-1G6E2,38,DDR3-FINE OFFSET FOR TRCMIN,00 +MT18KSF1G72HZ-1G6E2,39,DDR3-BYTE 39 RESERVED,00 +MT18KSF1G72HZ-1G6E2,40,DDR3-BYTE 40 RESERVED,00 +MT18KSF1G72HZ-1G6E2,41,DDR3-PTRR TMAW MAC,84 +MT18KSF1G72HZ-1G6E2,42-59,DDR3-RESERVED BYTES 42-59,000000000000000000000000000000000000 +MT18KSF1G72HZ-1G6E2,60,DDR3-RC REV NOM MODULE HEIGHT,0F +MT18KSF1G72HZ-1G6E2,61,DDR3-MODULE THICKNESS (MAX),11 +MT18KSF1G72HZ-1G6E2,62,DDR3-REFERENCE RAW CARD ID,23 +MT18KSF1G72HZ-1G6E2,63,DDR3 - ADDRESS MAPPING/MODULE ATTRIBUTES,00 +MT18KSF1G72HZ-1G6E2,64,DDR3-HEATSPREADER SOLUTION,00 +MT18KSF1G72HZ-1G6E2,65,DDR3-REGISTER VENDOR ID (LSB),00 +MT18KSF1G72HZ-1G6E2,66,DDR3-REGISTER VENDOR ID (MSB),00 +MT18KSF1G72HZ-1G6E2,67,DDR3-REGISTER REVISON NUMBER,00 +MT18KSF1G72HZ-1G6E2,68,DDR3-REGISTER TYPE,00 +MT18KSF1G72HZ-1G6E2,69,DDR3-REG CTRL WORDS 1 AND ZERO,00 +MT18KSF1G72HZ-1G6E2,70,DDR3-REG CTRL WORDS 3 AND 2,00 +MT18KSF1G72HZ-1G6E2,71,DDR3-REG CTRL WORDS 5 AND 4,00 +MT18KSF1G72HZ-1G6E2,72,DDR3-REG CTRL WORDS 7 AND 6,00 +MT18KSF1G72HZ-1G6E2,73,DDR3-REG CTRL WORDS 9 AND 8,00 +MT18KSF1G72HZ-1G6E2,74,DDR3-REG CTRL WORDS 11 AND 10,00 +MT18KSF1G72HZ-1G6E2,75,DDR3-REG CTRL WORDS 13 AND 12,00 +MT18KSF1G72HZ-1G6E2,76,DDR3-REG CTRL WORDS 15 AND 14,00 +MT18KSF1G72HZ-1G6E2,77-116,DDR3-RESERVED BYTES 77-116,00000000000000000000000000000000000000000000000000000000000000000000000000000000 +MT18KSF1G72HZ-1G6E2,117,DDR3-MODULE MFR ID (LSB),80 +MT18KSF1G72HZ-1G6E2,118,DDR3-MODULE MFR ID (MSB),2C +MT18KSF1G72HZ-1G6E2,119,DDR3-MODULE MFR LOCATION ID,00 +MT18KSF1G72HZ-1G6E2,120,DDR3-MODULE MFR YEAR,00 +MT18KSF1G72HZ-1G6E2,121,DDR3-MODULE MFR WEEK,00 +MT18KSF1G72HZ-1G6E2,122-125,DDR3-MODULE SERIAL NUMBER,00000000 +MT18KSF1G72HZ-1G6E2,126-127,DDR3-CRC,296F +MT18KSF1G72HZ-1G6E2,128-145,DDR3-MODULE PART NUMBER,18KSF1G72HZ-1G6E2 +MT18KSF1G72HZ-1G6E2,146,DDR3-MODULE DIE REV,45 +MT18KSF1G72HZ-1G6E2,147,DDR3-MODULE PCB REV,32 +MT18KSF1G72HZ-1G6E2,148,DDR3-DRAM DEVICE MFR ID (LSB),80 +MT18KSF1G72HZ-1G6E2,149,DDR3-DRAM DEVICE MFR (MSB),2C +MT18KSF1G72HZ-1G6E2,150-175,DDR3-MFR RESERVED BYTES 150-175,0000000000000000000000000000000000000000000000000000 +MT18KSF1G72HZ-1G6E2,176-255,DDR3-CUSTOMER RESERVED BYTES 176-255,FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF \ No newline at end of file diff --git a/test/spd_data/MT8JTF12864AZ-1G4G1.csv b/test/spd_data/MT8JTF12864AZ-1G4G1.csv new file mode 100644 index 0000000..4d975f5 --- /dev/null +++ b/test/spd_data/MT8JTF12864AZ-1G4G1.csv @@ -0,0 +1,68 @@ +Part Number,Byte Number,Byte Description,Byte Value +MT8JTF12864AZ-1G4G1,0,DDR3-CRC RANGE; EEPROM BYTES; BYTES USED,92 +MT8JTF12864AZ-1G4G1,1,DDR3-SPD REVISON,10 +MT8JTF12864AZ-1G4G1,2,DDR3-DRAM DEVICE TYPE,0B +MT8JTF12864AZ-1G4G1,3,DDR3-MODULE TYPE (FORM FACTOR),02 +MT8JTF12864AZ-1G4G1,4,DDR3-SDRAM DEVICE DENSITY BANKS,02 +MT8JTF12864AZ-1G4G1,5,DDR3-SDRAM DEVICE ROW COLUMN COUNT,11 +MT8JTF12864AZ-1G4G1,6,DDR3-MODULE NOMINAL VDD,00 +MT8JTF12864AZ-1G4G1,7,DDR3-MODULE RANKS DEVICE DQ COUNT,01 +MT8JTF12864AZ-1G4G1,8,DDR3-ECC TAG MODULE MEMORY BUS WIDTH,03 +MT8JTF12864AZ-1G4G1,9,DDR3-FINE TIMEBASE DIVIDEND/DIVISOR,52 +MT8JTF12864AZ-1G4G1,10,DDR3-MEDIUM TIMEBASE DIVIDEND,01 +MT8JTF12864AZ-1G4G1,11,DDR3-MEDIUM TIMEBASE DIVISOR,08 +MT8JTF12864AZ-1G4G1,12,DDR3-MIN SDRAM CYCLE TIME (TCKMIN),0C +MT8JTF12864AZ-1G4G1,13,DDR3-BYTE 13 RESERVED,00 +MT8JTF12864AZ-1G4G1,14,DDR3-CAS LATENCIES SUPPORTED (CL4 => CL11),7E +MT8JTF12864AZ-1G4G1,15,DDR3-CAS LATENCIES SUPPORTED (CL12 => CL18),00 +MT8JTF12864AZ-1G4G1,16,DDR3-MIN CAS LATENCY TIME (TAAMIN),69 +MT8JTF12864AZ-1G4G1,17,DDR3-MIN WRITE RECOVERY TIME (TWRMIN),78 +MT8JTF12864AZ-1G4G1,18,DDR3-MIN RAS# TO CAS# DELAY (TRCDMIN),69 +MT8JTF12864AZ-1G4G1,19,DDR3-MIN ROW ACTIVE TO ROW ACTIVE DELAY (TRRDMIN),30 +MT8JTF12864AZ-1G4G1,20,DDR3-MIN ROW PRECHARGE DELAY (TRPMIN),69 +MT8JTF12864AZ-1G4G1,21,DDR3-UPPER NIBBLE FOR TRAS TRC,11 +MT8JTF12864AZ-1G4G1,22,DDR3-MIN ACTIVE TO PRECHARGE DELAY (TRASMIN),20 +MT8JTF12864AZ-1G4G1,23,DDR3-MIN ACTIVE TO ACTIVE/REFRESH DELAY (TRCMIN),89 +MT8JTF12864AZ-1G4G1,24,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) LSB,70 +MT8JTF12864AZ-1G4G1,25,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) MSB,03 +MT8JTF12864AZ-1G4G1,26,DDR3-MIN INTERNAL WRITE TO READ CMD DELAY (TWTRMIN),3C +MT8JTF12864AZ-1G4G1,27,DDR3-MIN INTERNAL READ TO PRECHARGE CMD DELAY (TRTPMIN),3C +MT8JTF12864AZ-1G4G1,28,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) MSB,00 +MT8JTF12864AZ-1G4G1,29,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) LSB,F0 +MT8JTF12864AZ-1G4G1,30,DDR3-SDRAM DEVICE OUTPUT DRIVERS SUPPORTED,82 +MT8JTF12864AZ-1G4G1,31,DDR3-SDRAM DEVICE THERMAL REFRESH OPTIONS,05 +MT8JTF12864AZ-1G4G1,32,DDR3-MODULE THERMAL SENSOR,00 +MT8JTF12864AZ-1G4G1,33,DDR3-SDRAM DEVICE TYPE,00 +MT8JTF12864AZ-1G4G1,34-59,DDR3-RESERVED BYTES 34-59,0000000000000000000000000000000000000000000000000000 +MT8JTF12864AZ-1G4G1,60,DDR3-MODULE HEIGHT (NOMINAL),0F +MT8JTF12864AZ-1G4G1,61,DDR3-MODULE THICKNESS (MAX),01 +MT8JTF12864AZ-1G4G1,62,DDR3-REFERENCE RAW CARD ID,00 +MT8JTF12864AZ-1G4G1,63,DDR3 - ADDRESS MAPPING/MODULE ATTRIBUTES,00 +MT8JTF12864AZ-1G4G1,64,DDR3-HEATSPREADER SOLUTION,00 +MT8JTF12864AZ-1G4G1,65,DDR3-REGISTER VENDOR ID (LSB),00 +MT8JTF12864AZ-1G4G1,66,DDR3-REGISTER VENDOR ID (MSB),00 +MT8JTF12864AZ-1G4G1,67,DDR3-REGISTER REVISON NUMBER,00 +MT8JTF12864AZ-1G4G1,68,DDR3-REGISTER TYPE,00 +MT8JTF12864AZ-1G4G1,69,DDR3-REG CTRL WORDS 1 AND ZERO,00 +MT8JTF12864AZ-1G4G1,70,DDR3-REG CTRL WORDS 3 AND 2,00 +MT8JTF12864AZ-1G4G1,71,DDR3-REG CTRL WORDS 5 AND 4,00 +MT8JTF12864AZ-1G4G1,72,DDR3-REG CTRL WORDS 7 AND 6,00 +MT8JTF12864AZ-1G4G1,73,DDR3-REG CTRL WORDS 9 AND 8,00 +MT8JTF12864AZ-1G4G1,74,DDR3-REG CTRL WORDS 11 AND 10,00 +MT8JTF12864AZ-1G4G1,75,DDR3-REG CTRL WORDS 13 AND 12,00 +MT8JTF12864AZ-1G4G1,76,DDR3-REG CTRL WORDS 15 AND 14,00 +MT8JTF12864AZ-1G4G1,77-116,DDR3-RESERVED BYTES 77-116,00000000000000000000000000000000000000000000000000000000000000000000000000000000 +MT8JTF12864AZ-1G4G1,117,DDR3-MODULE MFR ID (LSB),80 +MT8JTF12864AZ-1G4G1,118,DDR3-MODULE MFR ID (MSB),2C +MT8JTF12864AZ-1G4G1,119,DDR3-MODULE MFR LOCATION ID,00 +MT8JTF12864AZ-1G4G1,120,DDR3-MODULE MFR YEAR,00 +MT8JTF12864AZ-1G4G1,121,DDR3-MODULE MFR WEEK,00 +MT8JTF12864AZ-1G4G1,122-125,DDR3-MODULE SERIAL NUMBER,00000000 +MT8JTF12864AZ-1G4G1,126-127,DDR3-CRC,1461 +MT8JTF12864AZ-1G4G1,128-145,DDR3-MODULE PART NUMBER,8JTF12864AZ-1G4G1 +MT8JTF12864AZ-1G4G1,146,DDR3-MODULE DIE REV,47 +MT8JTF12864AZ-1G4G1,147,DDR3-MODULE PCB REV,31 +MT8JTF12864AZ-1G4G1,148,DDR3-DRAM DEVICE MFR ID (LSB),80 +MT8JTF12864AZ-1G4G1,149,DDR3-DRAM DEVICE MFR (MSB),2C +MT8JTF12864AZ-1G4G1,150-175,DDR3-MFR RESERVED BYTES 150-175,0000000000000000000000000000000000000000000000000000 +MT8JTF12864AZ-1G4G1,176-255,DDR3-CUSTOMER RESERVED BYTES 176-255,FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF \ No newline at end of file diff --git a/test/spd_data/MT8KTF51264HZ-1G4E1.csv b/test/spd_data/MT8KTF51264HZ-1G4E1.csv new file mode 100644 index 0000000..a710ef0 --- /dev/null +++ b/test/spd_data/MT8KTF51264HZ-1G4E1.csv @@ -0,0 +1,76 @@ +Part Number,Byte Number,Byte Description,Byte Value +MT8KTF51264HZ-1G4E1,0,DDR3-CRC RANGE; EEPROM BYTES; BYTES USED,92 +MT8KTF51264HZ-1G4E1,1,DDR3-SPD REVISON,13 +MT8KTF51264HZ-1G4E1,2,DDR3-DRAM DEVICE TYPE,0B +MT8KTF51264HZ-1G4E1,3,DDR3-MODULE TYPE (FORM FACTOR),03 +MT8KTF51264HZ-1G4E1,4,DDR3-SDRAM DEVICE DENSITY BANKS,04 +MT8KTF51264HZ-1G4E1,5,DDR3-SDRAM DEVICE ROW COLUMN COUNT,21 +MT8KTF51264HZ-1G4E1,6,DDR3-MODULE NOMINAL VDD,02 +MT8KTF51264HZ-1G4E1,7,DDR3-MODULE RANKS DEVICE DQ COUNT,01 +MT8KTF51264HZ-1G4E1,8,DDR3-ECC TAG MODULE MEMORY BUS WIDTH,03 +MT8KTF51264HZ-1G4E1,9,DDR3-FINE TIMEBASE DIVIDEND/DIVISOR,11 +MT8KTF51264HZ-1G4E1,10,DDR3-MEDIUM TIMEBASE DIVIDEND,01 +MT8KTF51264HZ-1G4E1,11,DDR3-MEDIUM TIMEBASE DIVISOR,08 +MT8KTF51264HZ-1G4E1,12,DDR3-MIN SDRAM CYCLE TIME (TCKMIN),0C +MT8KTF51264HZ-1G4E1,13,DDR3-BYTE 13 RESERVED,00 +MT8KTF51264HZ-1G4E1,14,DDR3-CAS LATENCIES SUPPORTED (CL4 => CL11),7E +MT8KTF51264HZ-1G4E1,15,DDR3-CAS LATENCIES SUPPORTED (CL12 => CL18),00 +MT8KTF51264HZ-1G4E1,16,DDR3-MIN CAS LATENCY TIME (TAAMIN),69 +MT8KTF51264HZ-1G4E1,17,DDR3-MIN WRITE RECOVERY TIME (TWRMIN),78 +MT8KTF51264HZ-1G4E1,18,DDR3-MIN RAS# TO CAS# DELAY (TRCDMIN),69 +MT8KTF51264HZ-1G4E1,19,DDR3-MIN ROW ACTIVE TO ROW ACTIVE DELAY (TRRDMIN),30 +MT8KTF51264HZ-1G4E1,20,DDR3-MIN ROW PRECHARGE DELAY (TRPMIN),69 +MT8KTF51264HZ-1G4E1,21,DDR3-UPPER NIBBLE FOR TRAS TRC,11 +MT8KTF51264HZ-1G4E1,22,DDR3-MIN ACTIVE TO PRECHARGE DELAY (TRASMIN),20 +MT8KTF51264HZ-1G4E1,23,DDR3-MIN ACTIVE TO ACTIVE/REFRESH DELAY (TRCMIN),89 +MT8KTF51264HZ-1G4E1,24,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) LSB,20 +MT8KTF51264HZ-1G4E1,25,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) MSB,08 +MT8KTF51264HZ-1G4E1,26,DDR3-MIN INTERNAL WRITE TO READ CMD DELAY (TWTRMIN),3C +MT8KTF51264HZ-1G4E1,27,DDR3-MIN INTERNAL READ TO PRECHARGE CMD DELAY (TRTPMIN),3C +MT8KTF51264HZ-1G4E1,28,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) MSB,00 +MT8KTF51264HZ-1G4E1,29,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) LSB,F0 +MT8KTF51264HZ-1G4E1,30,DDR3-SDRAM DEVICE OUTPUT DRIVERS SUPPORTED,83 +MT8KTF51264HZ-1G4E1,31,DDR3-SDRAM DEVICE THERMAL REFRESH OPTIONS,05 +MT8KTF51264HZ-1G4E1,32,DDR3-MODULE THERMAL SENSOR,00 +MT8KTF51264HZ-1G4E1,33,DDR3-SDRAM DEVICE TYPE,00 +MT8KTF51264HZ-1G4E1,34,DDR3-FINE OFFSET FOR TCKMIN,00 +MT8KTF51264HZ-1G4E1,35,DDR3-FINE OFFSET FOR TAAMIN,00 +MT8KTF51264HZ-1G4E1,36,DDR3-FINE OFFSET FOR TRCDMIN,00 +MT8KTF51264HZ-1G4E1,37,DDR3-FINE OFFSET FOR TRPMIN,00 +MT8KTF51264HZ-1G4E1,38,DDR3-FINE OFFSET FOR TRCMIN,00 +MT8KTF51264HZ-1G4E1,39,DDR3-BYTE 39 RESERVED,00 +MT8KTF51264HZ-1G4E1,40,DDR3-BYTE 40 RESERVED,00 +MT8KTF51264HZ-1G4E1,41,DDR3-PTRR TMAW MAC,84 +MT8KTF51264HZ-1G4E1,42-59,DDR3-RESERVED BYTES 42-59,000000000000000000000000000000000000 +MT8KTF51264HZ-1G4E1,60,DDR3-RC REV NOM MODULE HEIGHT,0F +MT8KTF51264HZ-1G4E1,61,DDR3-MODULE THICKNESS (MAX),11 +MT8KTF51264HZ-1G4E1,62,DDR3-REFERENCE RAW CARD ID,41 +MT8KTF51264HZ-1G4E1,63,DDR3 - ADDRESS MAPPING/MODULE ATTRIBUTES,00 +MT8KTF51264HZ-1G4E1,64,DDR3-HEATSPREADER SOLUTION,00 +MT8KTF51264HZ-1G4E1,65,DDR3-REGISTER VENDOR ID (LSB),00 +MT8KTF51264HZ-1G4E1,66,DDR3-REGISTER VENDOR ID (MSB),00 +MT8KTF51264HZ-1G4E1,67,DDR3-REGISTER REVISON NUMBER,00 +MT8KTF51264HZ-1G4E1,68,DDR3-REGISTER TYPE,00 +MT8KTF51264HZ-1G4E1,69,DDR3-REG CTRL WORDS 1 AND ZERO,00 +MT8KTF51264HZ-1G4E1,70,DDR3-REG CTRL WORDS 3 AND 2,00 +MT8KTF51264HZ-1G4E1,71,DDR3-REG CTRL WORDS 5 AND 4,00 +MT8KTF51264HZ-1G4E1,72,DDR3-REG CTRL WORDS 7 AND 6,00 +MT8KTF51264HZ-1G4E1,73,DDR3-REG CTRL WORDS 9 AND 8,00 +MT8KTF51264HZ-1G4E1,74,DDR3-REG CTRL WORDS 11 AND 10,00 +MT8KTF51264HZ-1G4E1,75,DDR3-REG CTRL WORDS 13 AND 12,00 +MT8KTF51264HZ-1G4E1,76,DDR3-REG CTRL WORDS 15 AND 14,00 +MT8KTF51264HZ-1G4E1,77-116,DDR3-RESERVED BYTES 77-116,00000000000000000000000000000000000000000000000000000000000000000000000000000000 +MT8KTF51264HZ-1G4E1,117,DDR3-MODULE MFR ID (LSB),80 +MT8KTF51264HZ-1G4E1,118,DDR3-MODULE MFR ID (MSB),2C +MT8KTF51264HZ-1G4E1,119,DDR3-MODULE MFR LOCATION ID,00 +MT8KTF51264HZ-1G4E1,120,DDR3-MODULE MFR YEAR,00 +MT8KTF51264HZ-1G4E1,121,DDR3-MODULE MFR WEEK,00 +MT8KTF51264HZ-1G4E1,122-125,DDR3-MODULE SERIAL NUMBER,00000000 +MT8KTF51264HZ-1G4E1,126-127,DDR3-CRC,3D17 +MT8KTF51264HZ-1G4E1,128-145,DDR3-MODULE PART NUMBER,8KTF51264HZ-1G4E1 +MT8KTF51264HZ-1G4E1,146,DDR3-MODULE DIE REV,45 +MT8KTF51264HZ-1G4E1,147,DDR3-MODULE PCB REV,31 +MT8KTF51264HZ-1G4E1,148,DDR3-DRAM DEVICE MFR ID (LSB),80 +MT8KTF51264HZ-1G4E1,149,DDR3-DRAM DEVICE MFR (MSB),2C +MT8KTF51264HZ-1G4E1,150-175,DDR3-MFR RESERVED BYTES 150-175,0000000000000000000000000000000000000000000000000000 +MT8KTF51264HZ-1G4E1,176-255,DDR3-CUSTOMER RESERVED BYTES 176-255,FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF \ No newline at end of file diff --git a/test/spd_data/MT8KTF51264HZ-1G6E1.csv b/test/spd_data/MT8KTF51264HZ-1G6E1.csv new file mode 100644 index 0000000..0bb0cbd --- /dev/null +++ b/test/spd_data/MT8KTF51264HZ-1G6E1.csv @@ -0,0 +1,76 @@ +Part Number,Byte Number,Byte Description,Byte Value +MT8KTF51264HZ-1G6E1,0,DDR3-CRC RANGE; EEPROM BYTES; BYTES USED,92 +MT8KTF51264HZ-1G6E1,1,DDR3-SPD REVISON,13 +MT8KTF51264HZ-1G6E1,2,DDR3-DRAM DEVICE TYPE,0B +MT8KTF51264HZ-1G6E1,3,DDR3-MODULE TYPE (FORM FACTOR),03 +MT8KTF51264HZ-1G6E1,4,DDR3-SDRAM DEVICE DENSITY BANKS,04 +MT8KTF51264HZ-1G6E1,5,DDR3-SDRAM DEVICE ROW COLUMN COUNT,21 +MT8KTF51264HZ-1G6E1,6,DDR3-MODULE NOMINAL VDD,02 +MT8KTF51264HZ-1G6E1,7,DDR3-MODULE RANKS DEVICE DQ COUNT,01 +MT8KTF51264HZ-1G6E1,8,DDR3-ECC TAG MODULE MEMORY BUS WIDTH,03 +MT8KTF51264HZ-1G6E1,9,DDR3-FINE TIMEBASE DIVIDEND/DIVISOR,11 +MT8KTF51264HZ-1G6E1,10,DDR3-MEDIUM TIMEBASE DIVIDEND,01 +MT8KTF51264HZ-1G6E1,11,DDR3-MEDIUM TIMEBASE DIVISOR,08 +MT8KTF51264HZ-1G6E1,12,DDR3-MIN SDRAM CYCLE TIME (TCKMIN),0A +MT8KTF51264HZ-1G6E1,13,DDR3-BYTE 13 RESERVED,00 +MT8KTF51264HZ-1G6E1,14,DDR3-CAS LATENCIES SUPPORTED (CL4 => CL11),FE +MT8KTF51264HZ-1G6E1,15,DDR3-CAS LATENCIES SUPPORTED (CL12 => CL18),00 +MT8KTF51264HZ-1G6E1,16,DDR3-MIN CAS LATENCY TIME (TAAMIN),69 +MT8KTF51264HZ-1G6E1,17,DDR3-MIN WRITE RECOVERY TIME (TWRMIN),78 +MT8KTF51264HZ-1G6E1,18,DDR3-MIN RAS# TO CAS# DELAY (TRCDMIN),69 +MT8KTF51264HZ-1G6E1,19,DDR3-MIN ROW ACTIVE TO ROW ACTIVE DELAY (TRRDMIN),30 +MT8KTF51264HZ-1G6E1,20,DDR3-MIN ROW PRECHARGE DELAY (TRPMIN),69 +MT8KTF51264HZ-1G6E1,21,DDR3-UPPER NIBBLE FOR TRAS TRC,11 +MT8KTF51264HZ-1G6E1,22,DDR3-MIN ACTIVE TO PRECHARGE DELAY (TRASMIN),18 +MT8KTF51264HZ-1G6E1,23,DDR3-MIN ACTIVE TO ACTIVE/REFRESH DELAY (TRCMIN),81 +MT8KTF51264HZ-1G6E1,24,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) LSB,20 +MT8KTF51264HZ-1G6E1,25,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) MSB,08 +MT8KTF51264HZ-1G6E1,26,DDR3-MIN INTERNAL WRITE TO READ CMD DELAY (TWTRMIN),3C +MT8KTF51264HZ-1G6E1,27,DDR3-MIN INTERNAL READ TO PRECHARGE CMD DELAY (TRTPMIN),3C +MT8KTF51264HZ-1G6E1,28,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) MSB,00 +MT8KTF51264HZ-1G6E1,29,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) LSB,F0 +MT8KTF51264HZ-1G6E1,30,DDR3-SDRAM DEVICE OUTPUT DRIVERS SUPPORTED,83 +MT8KTF51264HZ-1G6E1,31,DDR3-SDRAM DEVICE THERMAL REFRESH OPTIONS,05 +MT8KTF51264HZ-1G6E1,32,DDR3-MODULE THERMAL SENSOR,00 +MT8KTF51264HZ-1G6E1,33,DDR3-SDRAM DEVICE TYPE,00 +MT8KTF51264HZ-1G6E1,34,DDR3-FINE OFFSET FOR TCKMIN,00 +MT8KTF51264HZ-1G6E1,35,DDR3-FINE OFFSET FOR TAAMIN,00 +MT8KTF51264HZ-1G6E1,36,DDR3-FINE OFFSET FOR TRCDMIN,00 +MT8KTF51264HZ-1G6E1,37,DDR3-FINE OFFSET FOR TRPMIN,00 +MT8KTF51264HZ-1G6E1,38,DDR3-FINE OFFSET FOR TRCMIN,00 +MT8KTF51264HZ-1G6E1,39,DDR3-BYTE 39 RESERVED,00 +MT8KTF51264HZ-1G6E1,40,DDR3-BYTE 40 RESERVED,00 +MT8KTF51264HZ-1G6E1,41,DDR3-PTRR TMAW MAC,84 +MT8KTF51264HZ-1G6E1,42-59,DDR3-RESERVED BYTES 42-59,000000000000000000000000000000000000 +MT8KTF51264HZ-1G6E1,60,DDR3-RC REV NOM MODULE HEIGHT,0F +MT8KTF51264HZ-1G6E1,61,DDR3-MODULE THICKNESS (MAX),11 +MT8KTF51264HZ-1G6E1,62,DDR3-REFERENCE RAW CARD ID,41 +MT8KTF51264HZ-1G6E1,63,DDR3 - ADDRESS MAPPING/MODULE ATTRIBUTES,00 +MT8KTF51264HZ-1G6E1,64,DDR3-HEATSPREADER SOLUTION,00 +MT8KTF51264HZ-1G6E1,65,DDR3-REGISTER VENDOR ID (LSB),00 +MT8KTF51264HZ-1G6E1,66,DDR3-REGISTER VENDOR ID (MSB),00 +MT8KTF51264HZ-1G6E1,67,DDR3-REGISTER REVISON NUMBER,00 +MT8KTF51264HZ-1G6E1,68,DDR3-REGISTER TYPE,00 +MT8KTF51264HZ-1G6E1,69,DDR3-REG CTRL WORDS 1 AND ZERO,00 +MT8KTF51264HZ-1G6E1,70,DDR3-REG CTRL WORDS 3 AND 2,00 +MT8KTF51264HZ-1G6E1,71,DDR3-REG CTRL WORDS 5 AND 4,00 +MT8KTF51264HZ-1G6E1,72,DDR3-REG CTRL WORDS 7 AND 6,00 +MT8KTF51264HZ-1G6E1,73,DDR3-REG CTRL WORDS 9 AND 8,00 +MT8KTF51264HZ-1G6E1,74,DDR3-REG CTRL WORDS 11 AND 10,00 +MT8KTF51264HZ-1G6E1,75,DDR3-REG CTRL WORDS 13 AND 12,00 +MT8KTF51264HZ-1G6E1,76,DDR3-REG CTRL WORDS 15 AND 14,00 +MT8KTF51264HZ-1G6E1,77-116,DDR3-RESERVED BYTES 77-116,00000000000000000000000000000000000000000000000000000000000000000000000000000000 +MT8KTF51264HZ-1G6E1,117,DDR3-MODULE MFR ID (LSB),80 +MT8KTF51264HZ-1G6E1,118,DDR3-MODULE MFR ID (MSB),2C +MT8KTF51264HZ-1G6E1,119,DDR3-MODULE MFR LOCATION ID,00 +MT8KTF51264HZ-1G6E1,120,DDR3-MODULE MFR YEAR,00 +MT8KTF51264HZ-1G6E1,121,DDR3-MODULE MFR WEEK,00 +MT8KTF51264HZ-1G6E1,122-125,DDR3-MODULE SERIAL NUMBER,00000000 +MT8KTF51264HZ-1G6E1,126-127,DDR3-CRC,E8C9 +MT8KTF51264HZ-1G6E1,128-145,DDR3-MODULE PART NUMBER,8KTF51264HZ-1G6E1 +MT8KTF51264HZ-1G6E1,146,DDR3-MODULE DIE REV,45 +MT8KTF51264HZ-1G6E1,147,DDR3-MODULE PCB REV,31 +MT8KTF51264HZ-1G6E1,148,DDR3-DRAM DEVICE MFR ID (LSB),80 +MT8KTF51264HZ-1G6E1,149,DDR3-DRAM DEVICE MFR (MSB),2C +MT8KTF51264HZ-1G6E1,150-175,DDR3-MFR RESERVED BYTES 150-175,0000000000000000000000000000000000000000000000000000 +MT8KTF51264HZ-1G6E1,176-255,DDR3-CUSTOMER RESERVED BYTES 176-255,FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF \ No newline at end of file diff --git a/test/spd_data/MT8KTF51264HZ-1G9P1.csv b/test/spd_data/MT8KTF51264HZ-1G9P1.csv new file mode 100644 index 0000000..cd7a7ef --- /dev/null +++ b/test/spd_data/MT8KTF51264HZ-1G9P1.csv @@ -0,0 +1,76 @@ +Part Number,Byte Number,Byte Description,Byte Value +MT8KTF51264HZ-1G9P1,0,DDR3-CRC RANGE; EEPROM BYTES; BYTES USED,92 +MT8KTF51264HZ-1G9P1,1,DDR3-SPD REVISON,13 +MT8KTF51264HZ-1G9P1,2,DDR3-DRAM DEVICE TYPE,0B +MT8KTF51264HZ-1G9P1,3,DDR3-MODULE TYPE (FORM FACTOR),03 +MT8KTF51264HZ-1G9P1,4,DDR3-SDRAM DEVICE DENSITY BANKS,04 +MT8KTF51264HZ-1G9P1,5,DDR3-SDRAM DEVICE ROW COLUMN COUNT,21 +MT8KTF51264HZ-1G9P1,6,DDR3-MODULE NOMINAL VDD,02 +MT8KTF51264HZ-1G9P1,7,DDR3-MODULE RANKS DEVICE DQ COUNT,01 +MT8KTF51264HZ-1G9P1,8,DDR3-ECC TAG MODULE MEMORY BUS WIDTH,03 +MT8KTF51264HZ-1G9P1,9,DDR3-FINE TIMEBASE DIVIDEND/DIVISOR,11 +MT8KTF51264HZ-1G9P1,10,DDR3-MEDIUM TIMEBASE DIVIDEND,01 +MT8KTF51264HZ-1G9P1,11,DDR3-MEDIUM TIMEBASE DIVISOR,08 +MT8KTF51264HZ-1G9P1,12,DDR3-MIN SDRAM CYCLE TIME (TCKMIN),09 +MT8KTF51264HZ-1G9P1,13,DDR3-BYTE 13 RESERVED,00 +MT8KTF51264HZ-1G9P1,14,DDR3-CAS LATENCIES SUPPORTED (CL4 => CL11),FE +MT8KTF51264HZ-1G9P1,15,DDR3-CAS LATENCIES SUPPORTED (CL12 => CL18),02 +MT8KTF51264HZ-1G9P1,16,DDR3-MIN CAS LATENCY TIME (TAAMIN),69 +MT8KTF51264HZ-1G9P1,17,DDR3-MIN WRITE RECOVERY TIME (TWRMIN),78 +MT8KTF51264HZ-1G9P1,18,DDR3-MIN RAS# TO CAS# DELAY (TRCDMIN),69 +MT8KTF51264HZ-1G9P1,19,DDR3-MIN ROW ACTIVE TO ROW ACTIVE DELAY (TRRDMIN),28 +MT8KTF51264HZ-1G9P1,20,DDR3-MIN ROW PRECHARGE DELAY (TRPMIN),69 +MT8KTF51264HZ-1G9P1,21,DDR3-UPPER NIBBLE FOR TRAS TRC,11 +MT8KTF51264HZ-1G9P1,22,DDR3-MIN ACTIVE TO PRECHARGE DELAY (TRASMIN),10 +MT8KTF51264HZ-1G9P1,23,DDR3-MIN ACTIVE TO ACTIVE/REFRESH DELAY (TRCMIN),79 +MT8KTF51264HZ-1G9P1,24,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) LSB,20 +MT8KTF51264HZ-1G9P1,25,DDR3-MIN REFRESH RECOVERY DELAY (TRFCMIN) MSB,08 +MT8KTF51264HZ-1G9P1,26,DDR3-MIN INTERNAL WRITE TO READ CMD DELAY (TWTRMIN),3C +MT8KTF51264HZ-1G9P1,27,DDR3-MIN INTERNAL READ TO PRECHARGE CMD DELAY (TRTPMIN),3C +MT8KTF51264HZ-1G9P1,28,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) MSB,00 +MT8KTF51264HZ-1G9P1,29,DDR3-MIN FOUR ACTIVE WINDOW DELAY (TFAWMIN) LSB,D8 +MT8KTF51264HZ-1G9P1,30,DDR3-SDRAM DEVICE OUTPUT DRIVERS SUPPORTED,83 +MT8KTF51264HZ-1G9P1,31,DDR3-SDRAM DEVICE THERMAL REFRESH OPTIONS,05 +MT8KTF51264HZ-1G9P1,32,DDR3-MODULE THERMAL SENSOR,00 +MT8KTF51264HZ-1G9P1,33,DDR3-SDRAM DEVICE TYPE,00 +MT8KTF51264HZ-1G9P1,34,DDR3-FINE OFFSET FOR TCKMIN,CA +MT8KTF51264HZ-1G9P1,35,DDR3-FINE OFFSET FOR TAAMIN,00 +MT8KTF51264HZ-1G9P1,36,DDR3-FINE OFFSET FOR TRCDMIN,00 +MT8KTF51264HZ-1G9P1,37,DDR3-FINE OFFSET FOR TRPMIN,00 +MT8KTF51264HZ-1G9P1,38,DDR3-FINE OFFSET FOR TRCMIN,00 +MT8KTF51264HZ-1G9P1,39,DDR3-BYTE 39 RESERVED,00 +MT8KTF51264HZ-1G9P1,40,DDR3-BYTE 40 RESERVED,00 +MT8KTF51264HZ-1G9P1,41,DDR3-PTRR TMAW MAC,88 +MT8KTF51264HZ-1G9P1,42-59,DDR3-RESERVED BYTES 42-59,000000000000000000000000000000000000 +MT8KTF51264HZ-1G9P1,60,DDR3-RC REV NOM MODULE HEIGHT,0F +MT8KTF51264HZ-1G9P1,61,DDR3-MODULE THICKNESS (MAX),11 +MT8KTF51264HZ-1G9P1,62,DDR3-REFERENCE RAW CARD ID,01 +MT8KTF51264HZ-1G9P1,63,DDR3 - ADDRESS MAPPING/MODULE ATTRIBUTES,00 +MT8KTF51264HZ-1G9P1,64,DDR3-HEATSPREADER SOLUTION,00 +MT8KTF51264HZ-1G9P1,65,DDR3-REGISTER VENDOR ID (LSB),00 +MT8KTF51264HZ-1G9P1,66,DDR3-REGISTER VENDOR ID (MSB),00 +MT8KTF51264HZ-1G9P1,67,DDR3-REGISTER REVISON NUMBER,00 +MT8KTF51264HZ-1G9P1,68,DDR3-REGISTER TYPE,00 +MT8KTF51264HZ-1G9P1,69,DDR3-REG CTRL WORDS 1 AND ZERO,00 +MT8KTF51264HZ-1G9P1,70,DDR3-REG CTRL WORDS 3 AND 2,00 +MT8KTF51264HZ-1G9P1,71,DDR3-REG CTRL WORDS 5 AND 4,00 +MT8KTF51264HZ-1G9P1,72,DDR3-REG CTRL WORDS 7 AND 6,00 +MT8KTF51264HZ-1G9P1,73,DDR3-REG CTRL WORDS 9 AND 8,00 +MT8KTF51264HZ-1G9P1,74,DDR3-REG CTRL WORDS 11 AND 10,00 +MT8KTF51264HZ-1G9P1,75,DDR3-REG CTRL WORDS 13 AND 12,00 +MT8KTF51264HZ-1G9P1,76,DDR3-REG CTRL WORDS 15 AND 14,00 +MT8KTF51264HZ-1G9P1,77-116,DDR3-RESERVED BYTES 77-116,00000000000000000000000000000000000000000000000000000000000000000000000000000000 +MT8KTF51264HZ-1G9P1,117,DDR3-MODULE MFR ID (LSB),80 +MT8KTF51264HZ-1G9P1,118,DDR3-MODULE MFR ID (MSB),2C +MT8KTF51264HZ-1G9P1,119,DDR3-MODULE MFR LOCATION ID,00 +MT8KTF51264HZ-1G9P1,120,DDR3-MODULE MFR YEAR,00 +MT8KTF51264HZ-1G9P1,121,DDR3-MODULE MFR WEEK,00 +MT8KTF51264HZ-1G9P1,122-125,DDR3-MODULE SERIAL NUMBER,00000000 +MT8KTF51264HZ-1G9P1,126-127,DDR3-CRC,46D3 +MT8KTF51264HZ-1G9P1,128-145,DDR3-MODULE PART NUMBER,8KTF51264HZ-1G9P1 +MT8KTF51264HZ-1G9P1,146,DDR3-MODULE DIE REV,50 +MT8KTF51264HZ-1G9P1,147,DDR3-MODULE PCB REV,31 +MT8KTF51264HZ-1G9P1,148,DDR3-DRAM DEVICE MFR ID (LSB),80 +MT8KTF51264HZ-1G9P1,149,DDR3-DRAM DEVICE MFR (MSB),2C +MT8KTF51264HZ-1G9P1,150-175,DDR3-MFR RESERVED BYTES 150-175,0000000000000000000000000000000000000000000000000000 +MT8KTF51264HZ-1G9P1,176-255,DDR3-CUSTOMER RESERVED BYTES 176-255,FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF \ No newline at end of file diff --git a/test/test_modules.py b/test/test_modules.py new file mode 100644 index 0000000..6fa5294 --- /dev/null +++ b/test/test_modules.py @@ -0,0 +1,96 @@ +# This file is Copyright (c) 2020 Antmicro +# License: BSD + +import os +import csv +import unittest + +import litedram.modules +from litedram.modules import SDRAMModule + + +def load_spd_reference(filename): + script_dir = os.path.dirname(os.path.realpath(__file__)) + path = os.path.join(script_dir, "spd_data", filename) + data = [0] * 256 + with open(path) as f: + reader = csv.DictReader(f) + for row in reader: + address = row["Byte Number"] + value = row["Byte Value"] + # ignore ranges (timings are specified per byte) + if len(address.split("-")) == 1: + data[int(address)] = int(value, 16) + return data + + +class TestSPD(unittest.TestCase): + def compare_geometry(self, module, module_ref): + self.assertEqual(module.memtype, module_ref.memtype) + self.assertEqual(module.nbanks, module_ref.nbanks) + self.assertEqual(module.nrows, module_ref.nrows) + self.assertEqual(module.ncols, module_ref.ncols) + + def compare_timings(self, module, module_ref): + self.assertEqual(module.memtype, module_ref.memtype) + + # technology timings + compared_timings = ["tREFI", "tWTR", "tCCD", "tRRD", "tZQCS"] + for timing in compared_timings: + txx = getattr(module.technology_timings, timing) + txx_ref = getattr(module_ref.technology_timings, timing) + with self.subTest(txx="technology_timings:" + timing): + self.assertEqual(txx, txx_ref) + + # speedgrade timings + compared_timings = ["tRP", "tRCD", "tWR", "tRFC", "tFAW", "tRAS"] + for freq, timings in module.speedgrade_timings.items(): + for timing in compared_timings: + txx = getattr(timings, timing) + txx_ref = getattr(module_ref.speedgrade_timings[freq], timing) + with self.subTest(txx="speedgrade_timings:" + timing): + self.assertEqual(txx, txx_ref) + + def test_MT16KTF1G64HZ(self): + data = load_spd_reference("MT16KTF1G64HZ-1G6N1.csv") + kwargs = dict(clk_freq=125e6, rate="1:4") + module_ref = litedram.modules.MT16KTF1G64HZ(**kwargs) + module = SDRAMModule.from_spd_data(data, **kwargs) + self.compare_geometry(module, module_ref) + sgt = module.speedgrade_timings["1600"] + self.assertEqual(sgt.tRP, 13.125) + self.assertEqual(sgt.tRCD, 13.125) + self.assertEqual(sgt.tRP + sgt.tRAS, 48.125) + + def test_MT18KSF1G72HZ(self): + data = load_spd_reference("MT18KSF1G72HZ-1G6E2.csv") + kwargs = dict(clk_freq=125e6, rate="1:4") + module_ref = litedram.modules.MT18KSF1G72HZ(**kwargs) + module = SDRAMModule.from_spd_data(data, **kwargs) + self.compare_geometry(module, module_ref) + sgt = module.speedgrade_timings["1600"] + self.assertEqual(sgt.tRP, 13.125) + self.assertEqual(sgt.tRCD, 13.125) + self.assertEqual(sgt.tRP + sgt.tRAS, 48.125) + + def test_MT8JTF12864(self): + data = load_spd_reference("MT8JTF12864AZ-1G4G1.csv") + kwargs = dict(clk_freq=125e6, rate="1:4") + module_ref = litedram.modules.MT8JTF12864(**kwargs) + module = SDRAMModule.from_spd_data(data, **kwargs) + self.compare_geometry(module, module_ref) + sgt = module.speedgrade_timings["1333"] + self.assertEqual(sgt.tRP, 13.125) + self.assertEqual(sgt.tRCD, 13.125) + self.assertEqual(sgt.tRP + sgt.tRAS, 49.125) + + def test_MT8KTF51264(self): + data = load_spd_reference("MT8KTF51264HZ-1G4E1.csv") + kwargs = dict(clk_freq=100e6, rate="1:4") + module_ref = litedram.modules.MT8KTF51264(**kwargs) + module = SDRAMModule.from_spd_data(data, **kwargs) + self.compare_geometry(module, module_ref) + sgt = module.speedgrade_timings["1333"] + self.assertEqual(sgt.tRP, 13.125) + self.assertEqual(sgt.tRCD, 13.125) + self.assertEqual(sgt.tRP + sgt.tRAS, 49.125)